| 96dc791d0b9e ("clk: qcom: clk-rcg2: Introduce a cfg offset for RCGs") |
| fe6b580ec64c ("clk: qcom: remove empty lines in clk-rcg.h") |
| cc4f6944d0e3 ("clk: qcom: Add support for RCG to register for DFS") |
| 7ef6f11887bd ("clk: qcom: Configure the RCGs to a safe source as needed") |
| bdc3bbdd40ba ("clk: qcom: Clear hardware clock control bit of RCG") |
| 081ba80206d6 ("clk: qcom: Add rcg ops to return floor value closest to the requested rate") |
| 400d9fda39bc ("clk: qcom: Enable FSM mode for votable alpha PLLs") |
| 31256f4892b4 ("clk: qcom: handle alpha PLLs with 16bit alpha val registers") |
| 9f4e627702c8 ("clk: qcom: Add support to initialize alpha plls") |
| feb65645c1d2 ("clk: qcom: Add support for alpha pll hwfsm ops") |
