| b6db3936f283 ("ARM: dts: meson: switch the clock controller to the HHI register area") |
| f31094fe8c16 ("ARM: dts: meson8b: fix the clock controller register size") |
| f7f9da89bc4f ("ARM: dts: meson8: fix the clock controller register size") |
| e3087187e5f1 ("ARM: dts: meson8: add the reset controller") |
| 59e45c691a7f ("ARM: dts: meson8: enable the GPIO interrupt controller") |
| 4a5a27116b44 ("ARM: dts: meson8: add support for booting the secondary CPU cores") |
| bd835d53f505 ("ARM: dts: meson: add SoC information nodes") |
| 45631ea8b5d8 ("ARM: dts: meson: mark the clock controller also as reset controller") |
| 40b5c4f30c7f ("ARM: dts: meson: add a node which describes the SRAM") |
| 43d91c587fc0 ("ARM: dts: meson8: add the PWM controller nodes") |
| 440bdcdbfa42 ("ARM: dts: move the pwm_ab and pwm_cd nodes to meson.dtsi") |
| f28d4bdb74b6 ("ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b") |
| a35910d3994a ("ARM: dts: meson: add the hardware random number generator") |
| a39a3b9f4ff0 ("ARM: dts: meson: add the SAR ADC") |
| 7a16f06b90ab ("ARM: dts: meson: use C preprocessor friendly include syntax") |
| 2c323c43a3d6 ("ARM: dts: meson8: add and use the real clock controller") |
| bbe5b23dfdd3 ("ARM: dts: meson: Extend L2 cache controller node for Meson8 and Meson8b") |
| f44135e1f961 ("ARM: dts: meson8b: inherit meson.dtsi from meson8b.dtsi") |
| 200a575b68d2 ("ARM: dts: meson: organize devices in their corresponding busses") |
| 8d1b908fe754 ("ARM: dts: meson8b: Add gpio-ranges properties") |
| 90f349ade2f1 ("ARM: dts: meson8: Add gpio-ranges properties") |
