| be2f449a19a1 ("drm/amd/display: Move opp reg access from hwss to opp module.") |
| f8e413bf3c47 ("drm/amd/display: Move dpp reg access from hwss to dpp module.") |
| 2e9d6a571cb7 ("drm/amd/display: Check opplist in pipe ctx not in res pool.") |
| e07f541f50a3 ("drm/amd/display: Use real BE and FE index to program regs.") |
| c8242b9858ae ("drm/amd/display: Move hubp reg access from hwss to hubp module.") |
| 72d520d4fa76 ("drm/amd/display: Update FMT and OPPBUF functions") |
| e7899002cf20 ("drm/amd/display: Fix unused variable warnings.") |
| b51adc77e220 ("drm/amd/display: Only blank DCN when we have set_blank implementation") |
| 39f26499c6ff ("drm/amd/display: Put dcn_mi_registers with other structs") |
| 4b8240bf916f ("drm/amd/display: hubp refactor") |
| 36192e7e5703 ("drm/amd/display: Update HUBP") |
| f23d558466cf ("drm/amd/display: Move OPP mpc tree initialization to hw_init") |
| 40e045a9733f ("drm/amd/display: OPTC cleanup/implementation") |
| 96d923887994 ("drm/amd/display: Add dppclk to dcn_bw_clocks") |
| cc55b1f5c31a ("drm/amd/display: Set mpcc_disconnect_pending during MPC reset") |
| 16a29dd3bb18 ("drm/amd/display: Refine update flags usage in update_dchubp_dpp") |
| f7f36c1f5477 ("drm/amd/display: OPP DPG test pattern") |
| 4e1c1875c79b ("drm/amd/display: Reset MPCC muxes during init") |
| 9a0beb3944f2 ("drm/amd/display: CNVC pseudocode review follow up") |
| 5cc2687c13ee ("drm/amd/display: Implement work around for optc underflow.") |
| 1ccda80ff454 ("drm/amd/display: Use same wait mpcc idle function.") |
| feb4a3cd8eb0 ("drm/amd/display: Integrating MPC pseudocode") |
| 621fd3e39fc0 ("drm/amd/display: Set OPP default values in init_hw") |
| 8980aa3c9ed6 ("drm/amd/display: Only program watermark for full update.") |
| 4a43586bac9a ("drm/amd/display: update output csc matrix values") |
| 125d10a23347 ("drm/amd/display: fix opp header register define") |
| 480bd0cf450b ("drm/amd/display: Update dchub and dpp as per update flags.") |
| afbeb2638b0a ("drm/amd/display: call set_mpc_output_csc from hwsequencer") |
| 671b00e26c6c ("drm/amd/display: Fix use before initialize warning") |
| a4e6d14ebe80 ("drm/amd/display: Optimize front end programming.") |
| e994340bfa57 ("drm/amd/display: Added Opp and Diags Interface for P to I") |
| b8fce2c9d773 ("drm/amd/display: Optimize programming front end") |
| 7f914a62c94f ("drm/amd/display: Apply work around for stutter.") |
| e58d866e8d63 ("drm/amd/display: Fixed not set scaler bug.") |
| 8c15e81975a2 ("drm/amd/display: Remove unused OPP functions from interface") |
| 0af4096db9ec ("drm/amd/display: Modified front end initiail in init_hw") |
| 33af27bb114f ("drm/amd/display: remove unnecessary waits in dcn10") |
| 3e64668d7926 ("drm/amd/display: fix regamma programming") |
| a6114e854c55 ("drm/amd/display: Fix some more color indentations") |
| e6c258cb4e6f ("drm/amd/display: Refactor disable front end pipes.") |
| 5fa2ec4fad36 ("drm/amd/display: renaming dpp function to follow naming convention") |
| ea826d640d8f ("drm/amd/display: call set csc_default if enable adjustment is false") |
| 6d56c5733282 ("drm/amd/display: Add OPP DPG blank function") |
| 6334ac93a1e1 ("drm/amd/display: cache pwl params and scl_data to avoid extra programming") |
| 073a45e824db ("drm/amd/display: Add tg_init interface.") |
| 38614212522d ("drm/amd/display: Enalbe blank data double buffer after mpc disconnected.") |
| bc71a20db285 ("drm/amd/display: Call ipp_program_bias_and_scale only if available") |
| ea00f2979bc5 ("drm/amd/display: function renaming for hubbub") |
| fa2123dbccdc ("drm/amd/display: Multi display synchronization logic") |
| 56ef6ed9faf3 ("drm/amd/display: Move hdr_metadata from plane to stream") |