| bfe0cd28518d ("Revert "drm/i915: W/A for underruns with WM1+ disabled on icl"") |
| bf002c100740 ("drm/i915: W/A for underruns with WM1+ disabled on icl") |
| d16221195ae2 ("drm/i915: Extract icl_set_pipe_chicken()") |
| e16a37508633 ("drm/i915: Enable hw workaround to bypass alpha") |
| ed69cd40685c ("drm/i915/glk, cnl: Implement WaDisableScalarClockGating") |
| 1a15b77bd140 ("drm/i915: Eliminate crtc->state usage from intel_update_pipe_config()") |
| 602ae8355056 ("drm/i915: Sanitize VLV/CHV watermarks properly") |
| ff32c54ef1ce ("drm/i915: Compute vlv/chv wms the atomic way") |
| 5012e604891a ("drm/i915: Compute VLV/CHV FIFO sizes based on the PM2 watermarks") |
| 814e7f0bf7b7 ("drm/i915: Plop vlv/chv fifo sizes into crtc state") |
| 855c79f5212a ("drm/i915: Plop vlv wm state into crtc_state") |
| 7eb4941f048f ("drm/i915: Move vlv wms from crtc->wm_state to crtc->wm.active.vlv") |
| f07d43d2da1c ("drm/i915: Track plane fifo sizes under intel_crtc") |
| 3dc38eea665f ("drm/i915: Remove direct usages of intel_crtc->config from DDI code") |
| e9ce1a625fca ("drm/i915: Pass intel_crtc to DDI functions called from crtc en/disable") |
| 5be6e3340099 ("drm/i915: Do .init_clock_gating() earlier to avoid it clobbering watermarks") |
| a5509abda48e ("drm/i915: Fix legacy cursor vs. watermarks for ILK-BDW") |
| dd689287b977 ("drm/i915: Prevent concurrent tiling/framebuffer modifications") |
| 9aceb5c15d84 ("drm/i915: Fix all intel_framebuffer_init failures to take the error path") |
| 62b695662a24 ("drm/i915: Only enable DDI IO power domains after enabling DPLL") |
| 71cc22e5db89 ("drm/i915/glk: Don't enable DDI IO power domains during init") |
| 5a97bcc69cc0 ("drm/i915: Amalgamate flushing of display objects") |
| 8d8c386c3869 ("drm/i915: Add power well SW/HW state verification") |
| 75ccb2ecb8fc ("drm/i915: Call the sync_hw hook for power wells without a domain") |
| 24dbf51a5517 ("drm/i915: struct_mutex is not required for allocating the framebuffer") |
| 70001cd25654 ("drm/i915: Remove struct_mutex for destroying framebuffers") |
| 370a81fb89cb ("drm/i915: Remove unused function intel_ddi_get_link_dpll()") |
| d8fc70b7367b ("drm/i915: Make power domain masks 64 bit long") |
| bb0f4aab0e76 ("drm/i915: Track full cdclk state for the logical and actual cdclk frequencies") |
| 49cd97a35d90 ("drm/i915: Start moving the cdclk stuff into a distinct state structure") |
| 8f0cfa4d2a62 ("drm/i915: Pass computed vco to bxt_set_cdclk()") |
| 7ff89ca21358 ("drm/i915: Move most cdclk/rawclk related code to intel_cdclk.c") |
| 4717e8bb7341 ("drm/i915: Clean up the .get_cdclk() assignment if ladder") |
| c49a0d054a05 ("drm/i915: s/get_display_clock_speed/get_cdclk/") |
| 4e841ecd4e18 ("drm/i915: Nuke intel_mode_max_pixclk()") |
| a7d1b3f41a2d ("drm/i915: Store the pipe pixel rate in the crtc state") |
| 3c779a49bd7c ("drm/i915: Avoid BIT(max) - 1 and use GENMASK(max - 1, 0)") |
| 6248017ae530 ("drm/i915: Get correct display clock on 945gm") |
| ba318c61a971 ("drm/i915: Drain the freed state from the tail of the next commit") |
| 69aeafeae9b3 ("drm/i915: Flush untouched framebuffers before display on !llc") |
| b976dc53ec43 ("drm/i915: Introduce IS_GEN9_BC for Skylake and Kabylake.") |
| 8da53efaa228 ("drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL.") |
| eb955eee27d9 ("drm/i915: Move atomic state free from out of fence release") |
| 31bb2ef97ea9 ("drm/i915: Check for NULL atomic state in intel_crtc_disable_noatomic()") |
| a8cd6da0c0d5 ("drm/i915: Remove crtc->config usage from intel_modeset_readout_hw_state()") |
| be1e341513ca ("drm/i915: Track pinned vma in intel_plane_state") |
| 3c5e37f169cb ("drm/i915: Avoid drm_atomic_state_put(NULL) in intel_display_resume") |
| 1d4258db3e0b ("drm/i915: Remove useless casts to intel_plane_state") |
| 957870f93412 ("drm/i915: Split out i915_gem_object_set_tiling()") |
| 91d4e0aa923e ("drm/i915: Move ggtt fence/alignment to i915_gem_tiling.c") |
