| cb54fbd21a8f ("clk: sunxi-ng: Add maximum rate constraint to NM PLLs") |
| 2d2b61c13a4b ("clk: sunxi-ng: Add check for minimal rate to NM PLLs") |
| 7d333ef1cc1b ("clk: sunxi-ng: Support fixed post-dividers on NM style clocks") |
| 392ba5fafcdf ("clk: sunxi-ng: nm: Add support for sigma-delta modulation") |
| 4cdbc40d64d4 ("clk: sunxi-ng: nm: Check if requested rate is supported by fractional clock") |
| b64dfec01050 ("clk: sunxi-ng: Fix fractional mode for N-M clocks") |
| 4162c5ce52e5 ("clk: sunxi-ng: use 1 as fallback for minimum multiplier") |
| 0c3c8e135897 ("clk: sunxi-ng: Implement multiplier maximum") |
| c9520be38390 ("clk: sunxi-ng: mult: Fix minimum in round rate") |
| e66f81bbd746 ("clk: sunxi-ng: Implement factors offsets") |
| 2beaa601c849 ("clk: sunxi-ng: Implement minimum for multipliers") |
| 6e0d50daa97f ("clk: sunxi-ng: Add minimums for all the relevant structures and clocks") |
| b8302c7267de ("clk: sunxi-ng: Finish to convert to structures for arguments") |
| ee28648cb2b4 ("clk: sunxi-ng: Remove the use of rational computations") |
| a501a14e38cc ("clk: sunxi-ng: Rename the internal structures") |