| f167675486c3 ("clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate register") |
| b7c7b05065aa ("clk: sunxi-ng: add support for H6 PRCM CCU") |
| 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU") |
| 2e08e4d2ff48 ("dt-bindings: add device tree binding for Allwinner H6 main CCU") |
| c84f5683f6e9 ("clk: sunxi-ng: Add sun4i/sun7i CCU driver") |
| 7e784240bd37 ("dt-bindings: clock: sunxi-ccu: Add compatibles for sun5i CCU driver") |
| 0d28276b5cb5 ("dt-bindings: clock: sunxi-ccu: Add compatible string for A83T PRCM") |
| 11ad470c5486 ("dt-bindings: clock: sunxi-ccu: Add compatible string for A83T CCU") |
| a91afc974ee8 ("dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks") |
| d4879bda9121 ("dt-bindings: update device tree binding for Allwinner PRCM CCUs") |
| 9be1c8afb492 ("clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver") |
| 5e73761786d6 ("clk: sunxi-ng: Add sun5i CCU driver") |
| 4a9decc9a764 ("dt-bindings: add device binding for the CCU of Allwinner V3s") |
| a43c96427e71 ("clk: sunxi-ng: fix PLL_CPUX adjusting on H3") |
| c6a0637460c2 ("clk: sunxi-ng: Add A64 clocks") |
