| 265f5ba6c209 ("drm/amd/display: Move PME to function pointer call semantics") |
| b0a634ac6833 ("drm/amd/display: Refine the implementation of dm_pp_get_funcs_rv") |
| f0626896bb2f ("drm/amd/display: Drop unnecessary header file") |
| f7c1ed341ae0 ("drm/amd/display: Moving powerplay functions to a separate class") |
| 724a75524b1c ("drm/amd/display: Convert 10kHz clks from PPLib into kHz") |
| 015ec7591869 ("drm/amd/display: Add dmpp clks types for conversion") |
| 25684c59aff5 ("drm/amd/display: Add clock types to applying clk for voltage") |
| 9654a28b3ac0 ("drm/amd/display: Use local structs instead of struct pointers") |
| 92276a06f9c3 ("drm/amd/display: Introduce pp-smu raven functions") |
| db4e525304dd ("drm/amd/display: Adding Get static clocks for dm_pp interface") |
| 28825c841bfd ("drm/amd/display: Apply clock for voltage request") |
| 734b096096ac ("drm/amd/display: Adding dm-pp clocks getting by voltage") |
| 9dac0c3fb410 ("drm/amdgpu/display: check if ppfuncs exists before using it") |
| 10dd2b865393 ("drm/amd/display: Fix wrong latency assignment for VEGA clock levels") |
| bfdec2340478 ("drm/amd/display: Implement dm_pp_get_clock_levels_by_type_with_latency") |
| 1296423bf23c ("drm/amd/display: define DC_LOGGER for logger") |
| 2f3fd67a8af2 ("drm/amd/display: Use MACROS instead of dm_logger") |
| 627c9a0a5002 ("drm/amd/display: Remove unused dm_pp_ interfaces") |
| fdf0c1c2f75e ("drm/amd/display: Add logging for aux DPCD access") |
| 4cac1e6d2ffa ("drm/amd/display: Keep eDP stream enabled during boot.") |
| 91d4a1290034 ("drm/amd/display: boot up/S4 fix mainlink off before BL.") |
| c5fc7f59a71a ("drm/amd/display: resume from S3 bypass power down HW block.") |
| 24a30505f312 ("drm/amd/display: Check hubp in pipe_ctx not in res_pool.") |
| ac916c914c31 ("drm/amd/display: Remove return when no EDID read.") |
| cf1835f03ffb ("drm/amd/display: fix backlight not off at resume from S4") |
| 31aec354f92c ("drm/amd/display: Implement interface for CRC on CRTC") |
| c7e74f49598d ("drm/amd/display: Log which clocks are unsupported") |
| e07f541f50a3 ("drm/amd/display: Use real BE and FE index to program regs.") |
| c8242b9858ae ("drm/amd/display: Move hubp reg access from hwss to hubp module.") |
| 25292028d74b ("drm/amd/display: Disable eDP with a proper sequence.") |
| 91178796ba17 ("drm/amd/display: disable eDP backlight for extend monitor only reboot use case.") |
| a8c40b0b5add ("drm/amd/display: PME sw wa to support waking AZ D3") |
| e7899002cf20 ("drm/amd/display: Fix unused variable warnings.") |
| b51adc77e220 ("drm/amd/display: Only blank DCN when we have set_blank implementation") |
| 39f26499c6ff ("drm/amd/display: Put dcn_mi_registers with other structs") |
| 4b8240bf916f ("drm/amd/display: hubp refactor") |
| 36192e7e5703 ("drm/amd/display: Update HUBP") |
| 23bfb33181d2 ("drm/amd/display: Fix check for whether dmcu fw is running") |
| f23d558466cf ("drm/amd/display: Move OPP mpc tree initialization to hw_init") |
| a018298ff850 ("drm/amd/display: Add disclaimer to BW and DML code provided by HW") |
| 3f4e3a282e12 ("drm/amd/display: Use macro for isnan check") |
| cc55b1f5c31a ("drm/amd/display: Set mpcc_disconnect_pending during MPC reset") |
| f7f36c1f5477 ("drm/amd/display: OPP DPG test pattern") |
| 4e1c1875c79b ("drm/amd/display: Reset MPCC muxes during init") |
| 5cc2687c13ee ("drm/amd/display: Implement work around for optc underflow.") |
| 4010472575f4 ("drm/amd/display: Add optimized_required flag") |
| 1ccda80ff454 ("drm/amd/display: Use same wait mpcc idle function.") |
| feb4a3cd8eb0 ("drm/amd/display: Integrating MPC pseudocode") |
| 621fd3e39fc0 ("drm/amd/display: Set OPP default values in init_hw") |
| 404dfe1c5644 ("drm/amd/display: DMCU and ABM maintenance and refactor") |
