| da1043cf22d3 ("drm/amd/display: Fix runtime errors for diagnostic tests") |
| dd7304353451 ("drm/amd/display: implement DPMS DTN test v2") |
| c2437b1f16d9 ("drm/amd/display: Expose bunch of functions from dcn10_hw_sequencer") |
| d7b539d34ace ("drm/amd/display: add safe_to_lower support to dcn wm programming") |
| 6b8e1eb7c6e0 ("drm/amd/display: Update HW sequencer initialization") |
| 3ba43a59927f ("drm/amd/display: underflow/blankscreen recovery") |
| 34cb6b3860a4 ("drm/amd/display: compact the rq/dlg/ttu log") |
| a47654633596 ("drm/amd/display: add calculated clock logging to DTN") |
| 0a93dc7f595f ("drm/amd/display: add rq/dlg/ttu to dtn log") |
| 5ebfb7a5996e ("drm/amd/display: Move DCC support functions into dchubbub") |
| a052a516de4c ("drm/amd/display: align dtn logs and add mpc idle bit print") |
| dfd01f299987 ("drm/amd/display: add mpc to dtn log") |
| a4056c2a6344 ("drm/amd/display: use HW hdr mult for brightness boost") |
| 1296423bf23c ("drm/amd/display: define DC_LOGGER for logger") |
| 2f3fd67a8af2 ("drm/amd/display: Use MACROS instead of dm_logger") |
| 8ff15a8fcc58 ("drm/amd/display: Update DCN OPTC registers") |
| cf1df90f35ac ("drm/amd/display: Check DCN PState ASSERT failure") |
| fdf0c1c2f75e ("drm/amd/display: Add logging for aux DPCD access") |
| 4cac1e6d2ffa ("drm/amd/display: Keep eDP stream enabled during boot.") |
| 91d4a1290034 ("drm/amd/display: boot up/S4 fix mainlink off before BL.") |
| c5fc7f59a71a ("drm/amd/display: resume from S3 bypass power down HW block.") |
| 24a30505f312 ("drm/amd/display: Check hubp in pipe_ctx not in res_pool.") |
| ac916c914c31 ("drm/amd/display: Remove return when no EDID read.") |
| cf5e4a67f410 ("drm/amd/display: Add debug flag for p010_mpo_support") |
| a771c1f28921 ("drm/amd/display: Force full update on pixel_format_change") |
| 7c357e61e21b ("drm/amd/display: dpms off mute az audio endpoint only.") |
| cf1835f03ffb ("drm/amd/display: fix backlight not off at resume from S4") |
| 3be1406a72b0 ("drm/amd/display: Add timing generator count to resource pool.") |
| 31aec354f92c ("drm/amd/display: Implement interface for CRC on CRTC") |
| f8e413bf3c47 ("drm/amd/display: Move dpp reg access from hwss to dpp module.") |
| 405c50a07d3f ("drm/amd/display: Fix check for setting input TF") |
| c7e74f49598d ("drm/amd/display: Log which clocks are unsupported") |
| e07f541f50a3 ("drm/amd/display: Use real BE and FE index to program regs.") |
| c8242b9858ae ("drm/amd/display: Move hubp reg access from hwss to hubp module.") |
| 25292028d74b ("drm/amd/display: Disable eDP with a proper sequence.") |
| 91178796ba17 ("drm/amd/display: disable eDP backlight for extend monitor only reboot use case.") |
| 72d520d4fa76 ("drm/amd/display: Update FMT and OPPBUF functions") |
| e7899002cf20 ("drm/amd/display: Fix unused variable warnings.") |
| b51adc77e220 ("drm/amd/display: Only blank DCN when we have set_blank implementation") |
| 39f26499c6ff ("drm/amd/display: Put dcn_mi_registers with other structs") |
| 4b8240bf916f ("drm/amd/display: hubp refactor") |
| e9be38b42ace ("drm/amd/display: Clean up DCN cursor code") |
| 36192e7e5703 ("drm/amd/display: Update HUBP") |
| 23bfb33181d2 ("drm/amd/display: Fix check for whether dmcu fw is running") |
| f23d558466cf ("drm/amd/display: Move OPP mpc tree initialization to hw_init") |
| 40e045a9733f ("drm/amd/display: OPTC cleanup/implementation") |
| 493942cd250c ("drm/amd/display: dpp clean up") |
| a018298ff850 ("drm/amd/display: Add disclaimer to BW and DML code provided by HW") |
| 3f4e3a282e12 ("drm/amd/display: Use macro for isnan check") |
| cc55b1f5c31a ("drm/amd/display: Set mpcc_disconnect_pending during MPC reset") |
