| d757535e3116 ("drm/i915/tgl: Add vbt value mapping for DDC Bus pin") |
| c6f7acb80abf ("drm/i915/ehl: Introduce Mule Creek Canyon PCH") |
| 65f42cdc6e65 ("drm/i915: convert the IRQ initialization functions to intel_uncore") |
| 9d9523d8c122 ("drm/i915: add GEN2_ prefix to the I{E, I, M, S}R registers") |
| 2918c3caefc1 ("drm/i915: don't specify the IRQ register in the gen2 macros") |
| 68eb49b140c3 ("drm/i915: refactor the IRQ init/reset macros") |
| 95007efbe608 ("drm/i915: Convert i915_reset.c over to using uncore mmio") |
| fdc4e9267f9b ("drm/i915: Make use of 'engine->uncore'") |
| 3a891a626794 ("drm/i915: Move intel_engine_mask_t around for use by i915_request_types.h") |
| e15be4298f35 ("drm/i915: fix i9xx irq enable/disable") |
| baba6e572b38 ("drm/i915: take a reference to uncore in the engine and use it") |
| 97a04e0d07c4 ("drm/i915: switch intel_wait_for_register to uncore") |
| d2d551c06f81 ("drm/i915: intel_wait_for_register_fw to uncore") |
| a2b4abfc626b ("drm/i915: switch uncore mmio funcs to use intel_uncore") |
| 6cc5ca768825 ("drm/i915: rename raw reg access functions") |
| e0695db7298e ("drm/i915: Create/destroy VM (ppGTT) for use with contexts") |
| 7dc40713618c ("drm/i915: Introduce a mutex for file_priv->context_idr") |
| 3aa9945a528e ("drm/i915: Separate GEM context construction and registration to userspace") |
| 6ebc9692a7ad ("drm/i915: make raw access function work on uncore") |
| 25286aaca9ce ("drm/i915: move regs pointer inside the uncore structure") |
| 272c7e52302e ("drm/i915: reduce the dev_priv->uncore dance in uncore.c") |
| cb7ee69015aa ("drm/i915: make find_fw_domain work on intel_uncore") |
| f7de50278e5c ("drm/i915: make more uncore function work on intel_uncore") |
| 3ceea6a1b4d2 ("drm/i915: use intel_uncore for all forcewake get/put") |
| f568eeee5355 ("drm/i915: use intel_uncore in fw get/put internal paths") |
| 159367bb9e74 ("drm/i915: always use masks on FW regs") |
| fd79d93985e0 ("drm/i915/selftests: add test to verify get/put fw domains") |
| 535d8d27c0e2 ("drm/i915: do not pass dev_priv to low-level forcewake functions") |
| 9be8644a14c6 ("drm/i915/icl: split combo and mg pll disable") |
| 036f8d567b6c ("drm/i915/icl: split pll enable in three steps") |
| d2ab5ebf46b4 ("drm/i915/icl: split combo and mg pll enable") |
| 29b43ae2a61d ("drm/i915: Also use new comparative stuff for more ICP+ stuff") |
| c6c30b917d40 ("drm/i915: Start using comparative INTEL_PCH_TYPE") |
| fba84ad28e3b ("drm/i915: Move PCH_NOP to -1") |
| 85fddf0b0027 ("drm/i915: Introduce a context barrier callback") |
| c4d52feb2c46 ("drm/i915: Move over to intel_context_lookup()") |
| 4dc84b77b077 ("drm/i915: Store the intel_context_ops in the intel_engine_cs") |
| 39e2f501c1b4 ("drm/i915: Split struct intel_context definition to its own header") |
| 7e3d9a59410d ("drm/i915: Track active engines within a context") |
| ab3517c1eb01 ("drm/i915/dp: use single point of truth for PPS divisor register") |
| 1b61c4a3eea2 ("drm/i915/dp: deconflate PPS unlock from divisor register") |
| c6eeb4797eb9 ("drm/i915: Reduce presumption of request ordering for barriers") |
| 604c37d76689 ("drm/i915: Refactor common code to load initial power context") |
| 5861b013e2c7 ("drm/i915: Do a synchronous switch-to-kernel-context on idling") |
| 2835f4f36b6a ("drm/i915/selftests: Improve switch-to-kernel-context checking") |
| 50b022af5d6b ("drm/i915: Force GPU idle on suspend") |
| 3d6062491658 ("drm/i915: Make I915_GEM_IDLE_TIMEOUT into a macro") |
| 103b76eeff2e ("drm/i915: Use i915_global_register()") |
| cf4331dd3975 ("drm/i915: Move find_active_request() to the engine") |
| 8a68d464366e ("drm/i915: Store the BIT(engine->id) as the engine's mask") |
