| 12f04120d393 ("drm/amd/pm: make namings and comments more readable") |
| eb5f69e7660f ("drm/amd/pm: correct the requirement for umc cdr workaround") |
| bb7257b5a8b0 ("drm/amd/pm: apply the CDR workarounds only with some specific UMC firmwares(V2)") |
| 665945eb49d5 ("drm/amd/pm: implement a new umc cdr workaround") |
| 3646c00e74b2 ("drm/amd/pm: revise the umc hybrid cdr workaround") |
| 82cac71c1b64 ("drm/amd/pm: put Navi1X umc cdr workaround in post_smu_init") |
| 10144762e2c3 ("drm/amd/pm: postpone SOCCLK/UCLK enablement after DAL initialization(V2)") |
| 3204ff3e08f2 ("drm/amdgpu/swsmu: add get_fan_parameters callbacks for smu11 asics") |
| 5ce99853a6fd ("drm/amd/pm: add SMU11 common deep sleep control interface") |
| e988026fcf26 ("drm/amd/pm: add SMU11 common gfx ulv control interface") |
| e098bc9612c2 ("drm/amd/pm: optimize the power related source code layout") |
| 05f39286ce11 ("drm/amd/powerplay: enable Sienna Cichlid mgpu fan boost feature") |
| 94a670d5ac45 ("drm/amd/powerplay: enable Navi1X mgpu fan boost feature(V2)") |
| 8ca78a0a0e77 ("drm/amd/powerplay: add Sienna Cichlid support for gpu metrics export") |
| 6d4ff50a2774 ("drm/amd/powerplay: add Navi1x support for gpu metrics export") |
| f1c378593153 ("drm/amd/powerplay: add Arcturus support for gpu metrics export") |
| e4c9200df510 ("drm/amd/powerplay: implement SMU V11 common APIs for retrieving link speed/width") |
| 66f3db4ba62d ("drm/amdgpu/smu: rework i2c adpater registration") |
| 91190db1a72d ("drm/amd/powerplay: correct smu message for vf mode") |
| 7a3ecc82f1b9 ("drm/amd/powerplay: add msg map for mode1 reset") |
| bc50ca291e5e ("drm/amdgpu/sienna_cichlid: add SMU i2c support (v2)") |
| 1bc734759f28 ("drm/amdgpu/navi1x: add SMU i2c support (v2)") |
| 0e0e11e71e31 ("drm/amdgpu/swSMU: remove eeprom from the smu i2c handlers (v2)") |
| 66c868282f91 ("drm/amd/powerplay: move SMC message issuing APIs to smu_cmn.c") |
| c1b353b7eac5 ("drm/amd/powerplay: update the tables init related") |
| caad2613dc4b ("drm/amd/powerplay: move table setting common code to smu_cmn.c") |
| e7a95eea2250 ("drm/amd/powerplay: maximum code sharing around watermarks setting") |
| a7bae0619903 ("drm/amd/powerplay: move more APIs to smu_cmn.c") |
| af5ba6d21a70 ("drm/amd/powerplay: common API for disabling all features with exception") |
| 7dbf78051f75 ("drm/amd/powerplay: move ppfeature mask setting to smu_cmn.c") |
| 28251d726b2b ("drm/amd/powerplay: implement smu_cmn_get_enabled_mask() for all ASICs") |
| b4bb3aaf04af ("drm/amd/powerplay: move dpm feature enablement checking to smu_cmn.c") |
| 4d942ae349bb ("drm/amd/powerplay: move dpm feature support checking to smu_cmn.c") |
| d23c3ccc2176 ("drm/amd/powerplay: move clock dpm enablement check to smu_v11/v12") |
| 8264ee69f0d8 ("drm/amd/powerplay: drop unused code") |
| 6c339f37f1cd ("drm/amd/powerplay: unify swSMU index to asic specific index mapping") |
| 443c7f3c3641 ("drm/amdgpu: add read amdgpu_gfxoff status in debugfs") |
| d51dc6132795 ("drm/amd/powerplay: set VCN1 pg only for sienna_cichlid") |
| 3cd7e415aea4 ("drm/amd/powerplay: drop unused code around thermal range setting") |
| 1e1964b777ce ("drm/amd/powerplay: maximum the code sharing on thermal irq setting") |
| 0540ecedcba9 ("drm/amd/powerplay: sort the call flow on temperature ranges retrieving") |
| 2b1f12a2da04 ("drm/amd/powerplay: correct Sienna Cichlid temperature limit settings") |
| cbf3f132fe5d ("drm/amd/powerplay: correct Navi1X temperature limit settings") |
| 778f8e6afea6 ("drm/amd/powerplay: drop unnecessary wrapper around pcie parameters setting") |
| 42f75c849f17 ("drm/amd/powerplay: drop unused APIs and parameters") |
| 982d68b09358 ("drm/amd/powerplay: drop smu_v12_0.c unnecessary wrapper V2") |
| d56ff011367e ("drm/amd/powerplay: drop unnecessary wrappers") |
| 10e96d897329 ("drm/amd/powerplay: drop Sienna Cichlid specific set_soft_freq_limited_range") |
| 5a52694c756c ("drm/amd/powerplay: drop unnecessary Arcturus specific APIs") |
| b64d86889f1e ("drm/amd/powerplay: add new UMD pstate data structure") |
