| c2e1ea320d19 ("drm/bridge: ti-sn65dsi86: Train at faster rates if slower ones fail") |
| 3438ea3dc896 ("drm/bridge: ti-sn65dsi86: Group DP link training bits in a function") |
| 37c1d89820e7 ("drm/bridge: ti-sn65dsi86: Use 18-bit DP if we can") |
| 457622d9f99b ("drm/bridge: ti-sn65dsi86: Read num lanes from the DP sink") |
| cf33de1799c6 ("drm/bridge: ti-sn65dsi86: Config number of DP lanes Mo' Betta") |
| fa8a66c68755 ("drm/bridge: ti-sn65dsi86: Don't use MIPI variables for DP link") |
| 2f8fcc7794c1 ("drm/bridge: ti-sn65dsi86: zero is never greater than an unsigned int") |
| ca1b885cbe9e ("drm/bridge: ti-sn65dsi86: Split the setting of the dp and dsi rates") |
| c2bfc223882d ("drm/bridge: ti-sn65dsi86: Remove the mystery delay") |
| 638e9af16b95 ("drm/bridge: ti-sn65dsi86: Poll for training complete") |
| fc52d0ed1118 ("drm/bridge: ti-sn65dsi86: Poll for DP PLL Lock") |
| 73c89ead7185 ("drm/bridge: ti-sn65dsi86: Move panel_prepare() to pre_enable()") |
| 6c76c0eb031f ("drm/bridge: ti-sn65dsi86: Fixup register names") |
| a095f15c00e2 ("drm/bridge: add support for sn65dsi86 bridge driver") |
