| 6ceb72771735 ("drm/i915/icl: Don't update enabled dbuf slices struct until updated in hw") |
| 74bd8004e475 ("drm/i915/icl: track dbuf slice-2 status") |
| b879d58ff31b ("drm/i915/skl+: refactor WM calculation for NV12") |
| 746edf8f66ed ("drm/i915/icl: Enable both DBuf slices during init") |
| ad186f3fd98a ("drm/i915/icl: implement the display init/uninit sequences") |
| 234059da0f33 ("drm/i915/icl: NV12 y-plane ddb is not in same plane") |
| 53421c2fe99c ("drm/i915: Apply Display WA #1183 on skl, kbl, and cfl") |
| 2aa97491da8a ("drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL") |
| 2b58417ffbca ("drm/i915: Clean up some cdclk switch statements") |
| 9f817501bd7f ("drm/i915: Move rps.hw_lock to dev_priv and s/hw_lock/pcu_lock") |
| d46b00dc38c8 ("drm/i915: Separate RPS and RC6 handling for CHV") |
| 0d6fc92a73e0 ("drm/i915: Separate RPS and RC6 handling for VLV") |
| 960e54652cee ("drm/i915: Separate RPS and RC6 handling for gen6+") |
| 93564044fb2c ("drm/i915: Switch over to the LLC/eLLC hotspot avoidance hash mode for CCS") |
| 61843f0e6212 ("drm/i915: Name the IPS_PCODE_CONTROL bit") |
| 3e8ddd9e5071 ("drm/i915: Nuke some bogus tabs from the pcode defines") |
| 7e452fdbfca8 ("drm/i915/skl+: Optimize WM calculation") |
