| 5f1dd4dda5c8 ("x86/fsgsbase: Replace static_cpu_has() with boot_cpu_has()") |
| 005f141e5d5e ("x86/process/64: Use FSGSBASE instructions on thread copy and ptrace") |
| 58edfd2e0a93 ("x86/fsgsbase/64: Enable FSGSBASE instructions in helper functions") |
| b15378ca5081 ("x86/fsgsbase/64: Add intrinsics for FSGSBASE instructions") |
| 2fff071d28b5 ("x86/process: Unify copy_thread_tls()") |
| 64604d54d311 ("sched/x86_64: Don't save flags on context switch") |
| 6690e86be83a ("sched/x86: Save [ER]FLAGS on context switch") |
| 87ab4689ca65 ("x86/fsgsbase/64: Fix the base write helper functions") |
| ec3a94188df7 ("x86/fsgsbase/64: Clean up various details") |
| 22245bdf0ad8 ("x86/segments: Introduce the 'CPUNODE' naming to better document the segment limit CPU/node NR trick") |
| b2e2ba578e01 ("x86/vdso: Initialize the CPU/node NR segment descriptor earlier") |
| ffebbaedc861 ("x86/vdso: Introduce helper functions for CPU and node number") |
| c4755613a133 ("x86/segments/64: Rename the GDT PER_CPU entry to CPU_NUMBER") |
| e696c231bebf ("x86/fsgsbase/64: Make ptrace use the new FS/GS base helpers") |
| b1378a561fd1 ("x86/fsgsbase/64: Introduce FS/GS base helper functions") |
| 07e1d88adaae ("x86/fsgsbase/64: Fix ptrace() to read the FS/GS base accurately") |
| e78e5a91456f ("x86/vdso: Fix lsl operand order") |
| 45d7b255747c ("x86/entry/32: Enter the kernel via trampoline stack") |
| 46eabca284f9 ("x86/entry/32: Put ESPFIX code into a macro") |
| 9e97b73fdb23 ("x86/asm-offsets: Move TSS_sp0 and TSS_sp1 to asm-offsets.c") |
| 4fe2d8b11a37 ("x86/entry: Rename SYSENTER_stack to CPU_ENTRY_AREA_entry_stack") |
| c482feefe1ae ("x86/entry/64: Make cpu_entry_area.tss read-only") |
| 0f9a48100fba ("x86/entry: Clean up the SYSENTER_stack code") |
| 7fbbd5cbebf1 ("x86/entry/64: Remove the SYSENTER stack canary") |
| 40e7f949e0d9 ("x86/entry/64: Move the IST stacks into struct cpu_entry_area") |
| 3386bc8aed82 ("x86/entry/64: Create a per-CPU SYSCALL entry trampoline") |
| 3e3b9293d392 ("x86/entry/64: Return to userspace from the trampoline stack") |
| 7f2590a110b8 ("x86/entry/64: Use a per-CPU trampoline stack for IDT entries") |
| 6d9256f0a89e ("x86/espfix/64: Stop assuming that pt_regs is on the entry stack") |
| 9aaefe7b59ae ("x86/entry/64: Separate cpu_current_top_of_stack from TSS.sp0") |
| 72f5e08dbba2 ("x86/entry: Remap the TSS into the CPU entry area") |
| 1a935bc3d4ea ("x86/entry: Move SYSENTER_stack to the beginning of struct tss_struct") |
| 6e60e583426c ("x86/dumpstack: Handle stack overflow on all stacks") |
| 7fb983b4dd56 ("x86/entry: Fix assumptions that the HW TSS is at the beginning of cpu_tss") |
| ef8813ab2805 ("x86/mm/fixmap: Generalize the GDT fixmap mechanism, introduce struct cpu_entry_area") |
| aaeed3aeb39c ("x86/entry/gdt: Put per-CPU GDT remaps in ascending order") |
| 33a2f1a6c4d7 ("x86/dumpstack: Add get_stack_info() support for the SYSENTER stack") |
| 1a79797b58cd ("x86/entry/64: Allocate and enable the SYSENTER stack") |
| d375cf153059 ("x86/entry/64: Remove thread_struct::sp0") |
| 46f5a10a721c ("x86/entry/64: Remove all remaining direct thread_struct::sp0 reads") |
| 20bb83443ea7 ("x86/entry/64: Stop initializing TSS.sp0 at boot") |
| 3500130b84a3 ("x86/entry: Add task_top_of_stack() to find the top of a task's stack") |
| da51da189a24 ("x86/entry/64: Pass SP0 directly to load_sp0()") |
| bd7dc5a6afac ("x86/entry/32: Pull the MSR_IA32_SYSENTER_CS update code out of native_load_sp0()") |
| 4fbb39108f97 ("x86/entry/64: Use pop instead of movq in syscall_return_via_sysret") |
| e872045bfd9c ("x86/entry/64: Simplify reg restore code in the standard IRET paths") |
| 8a055d7f411d ("x86/entry/64: Move SWAPGS into the common IRET-to-usermode path") |
| 26c4ef9c49d8 ("x86/entry/64: Split the IRET-to-user and IRET-to-kernel paths") |
| 9da78ba6b47b ("x86/entry/64: Remove the restore_c_regs_and_iret label") |
| 015a2ea54786 ("x86/head: Fix head ELF function annotations") |
