| 4383736340f0 ("drm/amdgpu: fix vcn_v1_0_dec_ring_emit_wreg") |
| 0b5f83a37546 ("drm/amdgpu: wire up emit_wreg for VCN v1") |
| 8ace845ff0e8 ("drm/amdgpu: add vcn enc ring type and functions") |
| 7741cced67ae ("drm/amdgpu: expose vcn RB command") |
| 95aa13f6b196 ("drm/amdgpu: move amdgpu_vcn structure to vcn header") |
| a319f444bb86 ("drm/amdgpu: add vcn irq functions") |
| cca69fe8ff98 ("drm/amdgpu: add vcn decode ring type and functions") |
| 88b5af70e29e ("drm/amdgpu: add vcn ip block functions (v2)") |
| 95d0906f8506 ("drm/amdgpu: add initial vcn support and decode tests") |
| 70170d146d0f ("drm/amdgpu: add clinetid definition for vega10") |
| 50c3e2329968 ("drm/amdgpu: add uvd enc ring type and functions") |
| 5e5681788bef ("drm/amdgpu: move amdgpu_vce structure to vce header") |
| 4df654d293c6 ("drm/amdgpu: move amdgpu_uvd structure to uvd header") |
| d766e6a39338 ("drm/amdgpu: switch ih handling to two levels (v3)") |
| 254cd2e08dd0 ("drm/amdgpu: read hw register to check pg status.") |
| 6fc11b0ed354 ("drm/amdgpu: refine vce3.0 code and related powerplay pg code.") |
| 3a78696658a0 ("drm/amdgpu: power down/up uvd4 when smu disabled.") |
| ab71ac56f6d8 ("drm/amdgpu/virt: implement VI virt operation interfaces") |
| 1e9f1392795e ("drm/amdgpu/virt: add high level interfaces for virt") |
| bc992ba5a3c1 ("drm/amdgpu/virt: use kiq to access registers (v2)") |
| 880e87e38098 ("drm/amdgpu/gfx8: implement emit_rreg/wreg function") |
| 4e4bbe7343a6 ("drm/amdgpu:add new file for SRIOV") |
| bd7de27d81a7 ("drm/amdgpu:new field members for SRIOV") |
| c79b55618a9c ("drm/amdgpu: add get clockgating_state method for vce v3") |
| c8781f56c859 ("drm/amdgpu: add get clockgating_state method for uvd v5&v6") |
| 5a5099cbf4d8 ("drm/amdgpu/virt: rename fieldes of virtualization structure") |
| 4e638ae9c1e7 ("drm/amdgpu/gfx8: add support kernel interface queue(KIQ)") |
| 3731d12dce83 ("drm/amd/powerplay: fix vce cg logic error on CZ/St.") |
| 84f3f05b4432 ("drm/amdgpu: Don't touch GFX hw during HW fini") |
| aa4747c00a2d ("drm/amdgpu: refine uvd_4.2 clock gate sequence.") |
| 2068751d0941 ("drm/amdgpu: Add a ring type KIQ definition") |
| 3495a1035793 ("drm/amdgpu: turn on/off uvd clock when dpm enable/disable on CI") |
| a12551072126 ("drm/amdgpu: rework IP block registration (v2)") |
| 623fea1868ee ("drm/amdgpu/virtual_dce: move define into source file") |
| 2120df475d6d ("drm/amdgpu: enable virtual dce on SI") |
| 21cd942e5c47 ("drm/amdgpu: move the ring type into the funcs structure (v2)") |
| e12f3d7a23c9 ("drm/amdgpu: move IB and frame size directly into the engine description") |
| 7bc6be825a2e ("drm/amdgpu: remove explicit NULL init for parse_cs") |
| e08c90a77460 ("drm/amdgpu: remove 128 NOP hack from vm_flush v2") |
| 66f3b2d52715 ("drm/amdgpu: pad gfx and compute rings to 256 dw") |
| 073440d26272 ("drm/amdgpu: move VM defines into amdgpu_vm.h") |
| 78023016116f ("drm/amdgpu: move fence and ring defines into amdgpu_ring.h") |
| 561135049992 ("drm/amdgpu: move sync handling into a separate header") |
| 914b4dce4fda ("drm/amdgpu: stop using a bo list entry for the VM PTs") |
| f7da30d979d4 ("drm/amdgpu: move PT validation back into VM code v2") |
| f8991bab1aa2 ("drm/amdgpu: update the shadow PD together with the real one v2") |
| 6a7f76e70fac ("drm/amdgpu: add VRAM manager v2") |
| 483ef98588aa ("drm/amdgpu: rename amdgpu_whether_enable_virtual_display") |
