| 68e94f62cfbe ("drm/i915/tv: Bypass the vertical filter if possible") |
| 690157f0a9e7 ("drm/i915/tv: Fix >1024 modes on gen3") |
| e3bb355c7d8b ("drm/i915/tv: Generate better pipe timings for TV encoder") |
| 5023520fd372 ("drm/i915/tv: Use drm_mode_set_name() to name TV modes") |
| 65ddf7f968b8 ("drm/i915/tv: Deobfuscate preferred mode selection") |
| bda5f53206e5 ("drm/i915/tv: Nuke silly 0 initialzation of xpos/ypos") |
| 6801603d3d7d ("drm/i915/tv: Fix interlaced ysize calculation") |
| 204474a6b859 ("drm/i915: Pass down rc in intel_encoder->compute_config()") |
| f6bff60e927b ("drm/i915/icl: Fix HPD handling for TypeC legacy ports") |
| e845f099f1c6 ("drm/i915/dsc: Add Per connector debugfs node for DSC support/enable") |
| d04afb150172 ("drm/i915/icl: Add DSI encoder compute config hook") |
| ab8411483a3e ("drm/i915/icl: Get HW state for DSI encoder") |
| 8327af281d29 ("drm/i915/icl: Add get config functionality for DSI") |
| e27580487321 ("drm/i915/icl: Allocate DSI encoder/connector") |
| 240999cf339f ("i915/dp/fec: Add fec_enable to the crtc state.") |
| 168243c18010 ("drm/i915/dsc: Define & Compute VESA DSC params") |
| a4a157777c80 ("drm/i915/dp: Compute DSC pipe config in atomic check") |
| 7b610f1fbed2 ("drm/i915/dp: Add DSC params and DSC config to intel_crtc_state") |
| ff43bc379e16 ("drm/i915: Move ddb/wm programming into plane update/disable hooks on skl+") |
| 51de9c6d2559 ("drm/i915: Don't pass dev_priv around so much") |
| 8315847bf4df ("drm/i915: Clean up skl+ vs. icl+ watermark computation") |
| 6a3c910b081d ("drm/i915: Pass the entire skl_plane_wm to skl_compute_transition_wm()") |
| 14a43062b903 ("drm/i915: Remove some useless zeroing on skl+ wm calculations") |
| ce110ec311e9 ("drm/i915: Fix latency==0 handling for level 0 watermark on skl+") |
| 83234d13f9fd ("drm/i915: Reorganize plane register writes to make them more atomic") |
| ca0026790efa ("drm/i915: Always write both TILEOFF and LINOFF plane registers") |
| d26592c601ec ("drm/i915: Remove pointless goto fail") |
| 8e2b4dffeca0 ("drm/i915: Handle -EDEADLK from ironlake_check_fdi_lanes()") |
| 53cc68803668 ("drm/i915: Generalize skl_ddb_allocation_overlaps()") |
| 07464c7c0cf7 ("drm/i915: Clean up skl+ PLANE_POS vs. scaler handling") |
| 7b012bd62db9 ("drm/i915: Polish the skl+ plane keyval/msk/max register setup") |
| d0105af93976 ("drm/i915: Clean up skl_program_scaler()") |
| e69b348a7adb ("drm/i915: Nuke posting reads from plane update/disable funcs") |
| bfe60a0272dd ("drm/i915/icl: Enable Plane Input CSC for YUV to RGB Conversion") |
| 70332ac539c5 ("drm/i915/icl+: Sanitize port to PLL mapping") |
| bf4d57ff4110 ("drm/i915/icl: Find DSI presence for ICL") |
| 6cfd04b018f0 ("drm/i915/dp: Validate modes using max Output BPP and slice count when DSC supported") |
| d9218c8f6cf4 ("drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC") |
| 0f0fe8497d96 ("drm/i915/icl: Disable DSI IO power") |
| 019cec36f372 ("drm/i915/icl: Disable DSI ports") |
| 4769b598b943 ("drm/i915/icl: Put DSI link in ULPS") |
| 522cc3f717ac ("drm/i915/icl: Power down DSI panel") |
| 4e123bd3039d ("drm/i915/icl: Disable DSI transcoders") |
| d9d996b6ca43 ("drm/i915/icl: Turn OFF panel backlight") |
| bfee32bfca82 ("drm/i915/icl: Set max return packet size for DSI panel") |
| 77cac774b2fa ("drm/i915: Do not program aux plane offsets on gen11+") |
| 1e364f9008a7 ("drm/i915/gen11: Program the Y and UV plane for planar mode correctly, v3.") |
| cb2458baf8b5 ("drm/i915/gen11: Program the chroma upsampler for HDR planes.") |
| b048a00b3d96 ("drm/i915/gen11: Handle watermarks correctly for separate Y/UV planes, v2.") |
| 1ab554b0099b ("drm/i915/gen11: Link nv12 Y and UV planes in the atomic state, v5.") |
