blob: c972e9ccbbad660a36ecbeed586518db4da566b2 [file] [log] [blame]
52a288c73666 ("x86/mm/tlb: Revert the recent lazy TLB patches")
64482aafe55f ("x86/mm/tlb: Only send page table free TLB flush to lazy TLB CPUs")
2ff6ddf19c0e ("x86/mm/tlb: Leave lazy TLB mode at page table free time")
18bf3c3ea8ec ("x86/speculation: Use Indirect Branch Prediction Barrier in context switch")
6fd166aae78c ("x86/mm: Use/Fix PCID to optimize user/kernel switches")
48e111982cda ("x86/mm: Abstract switching CR3")
2ea907c4fe7b ("x86/mm: Allow flushing for future ASID switches")
aa8c6248f8c7 ("x86/mm/pti: Add infrastructure for page table isolation")
8a09317b895f ("x86/mm/pti: Prepare the x86/entry assembly code for entry/exit CR3 switching")
613e396bc0d4 ("init: Invoke init_espfix_bsp() from mm_init()")
1a3b0caeb77e ("x86/mm: Create asm/invpcid.h")
dd95f1a4b5ca ("x86/mm: Put MMU to hardware ASID translation in one place")
cb0a9144a744 ("x86/mm: Remove hard-coded ASID limit checks")
50fb83a62cf4 ("x86/mm: Move the CR3 construction functions to tlbflush.h")
3f67af51e56f ("x86/mm: Add comments to clarify which TLB-flush functions are supposed to flush what")
23cb7d46f371 ("x86/microcode: Dont abuse the TLB-flush interface")
c482feefe1ae ("x86/entry/64: Make cpu_entry_area.tss read-only")
0f9a48100fba ("x86/entry: Clean up the SYSENTER_stack code")
7fbbd5cbebf1 ("x86/entry/64: Remove the SYSENTER stack canary")
40e7f949e0d9 ("x86/entry/64: Move the IST stacks into struct cpu_entry_area")
3386bc8aed82 ("x86/entry/64: Create a per-CPU SYSCALL entry trampoline")
3e3b9293d392 ("x86/entry/64: Return to userspace from the trampoline stack")
7f2590a110b8 ("x86/entry/64: Use a per-CPU trampoline stack for IDT entries")
6d9256f0a89e ("x86/espfix/64: Stop assuming that pt_regs is on the entry stack")
9aaefe7b59ae ("x86/entry/64: Separate cpu_current_top_of_stack from TSS.sp0")
72f5e08dbba2 ("x86/entry: Remap the TSS into the CPU entry area")
1a935bc3d4ea ("x86/entry: Move SYSENTER_stack to the beginning of struct tss_struct")
7fb983b4dd56 ("x86/entry: Fix assumptions that the HW TSS is at the beginning of cpu_tss")
ef8813ab2805 ("x86/mm/fixmap: Generalize the GDT fixmap mechanism, introduce struct cpu_entry_area")
aaeed3aeb39c ("x86/entry/gdt: Put per-CPU GDT remaps in ascending order")
33a2f1a6c4d7 ("x86/dumpstack: Add get_stack_info() support for the SYSENTER stack")
1a79797b58cd ("x86/entry/64: Allocate and enable the SYSENTER stack")
0fd2e9c53d82 ("Merge commit 'upstream-x86-entry' into WIP.x86/mm")