| 8f54b3c6c921 ("drm/i915: Trim delays for wedging") |
| 9f58892ea996 ("drm/i915: Pull all the reset functionality together into i915_reset.c") |
| 18bb2bccb549 ("drm/i915: Serialise concurrent calls to i915_gem_set_wedged()") |
| decd29e6b5fe ("drm/i915: Only dump GPU state on set-wedged if interesting") |
| 183e260ba246 ("drm/i915: Track the rpm wakerefs for error handling") |
| 16e4dd0342a8 ("drm/i915: Markup paired operations on wakerefs") |
| bd780f37a361 ("drm/i915: Track all held rpm wakerefs") |
| f663b0ca9b7d ("drm/i915/selftests: recreate WA lists inside the selftest") |
| 2f80d7bd8d93 ("drm/i915: drop all drmP.h includes") |
| d25f71a162a9 ("drm/i915: Return immediately if trylock fails for direct-reclaim") |
| 55c15512a9cf ("drm/i915: Do not allow unwedging following a failed driver initialisation") |
| 55277e1f3107 ("drm/i915: Always try to reset the GPU on takeover") |
| a0f04cc27c50 ("drm/i915: always use INTEL_INFO() to access device info") |
| ed5eb1b78a88 ("drm/i915/reg: abstract display_mmio_offset access") |
| 0258404f9d38 ("drm/i915: start moving runtime device info to a separate struct") |
| 1216e3c3af25 ("drm/i915: Drop unused engine->irq_seqno_barrier w/a") |
| 6faf5916e6be ("drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation") |
| 167bc759e823 ("drm/i915: Restrict PSMI context load w/a to Haswell GT1") |
| f513ac76530c ("drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines") |
| 57b19d55189b ("drm/i915/icl: Record the valid VDBoxes with SFC capability") |
| 921f3a60e54e ("drm/i915/selftests: Verify we can perform resets from atomic context") |
| 5edd56d394dc ("drm/i915/selftests: Check we can recover a wedged device") |
| f3ce44a09a15 ("drm/i915: merge gen checks to use range") |
| cf819eff907a ("drm/i915: replace IS_GEN<N> with IS_GEN(..., N)") |
| 006900087727 ("drm/i915: Rename IS_GEN to IS_GEN_RANGE") |
| e6154e4cb8b0 ("drm/i915: Skip the ERR_PTR error state") |
| 3abd6143f971 ("drm/i915/selftests: verify_gt_engine_wa() needs rpm wakeref") |
| 79960227d93b ("Makefile: fix mixed tab and spaces") |
| d15f9cdd59ba ("drm/i915/icl: Do not change reserved registers related to PSR2") |
| 517974992593 ("drm/i915: Allocate a common scratch page") |
| 452420d22d5b ("drm/i915: Fuse per-context workaround handling with the common framework") |
| 69bcdecf1af5 ("drm/i915: Move register white-listing to the common workaround framework") |
| 28d6ccce73be ("drm/i915/selftests: Add tests for GT and engine workaround verification") |
| 094304beb4e1 ("drm/i915: Verify GT workaround state after GPU init") |
| 4a15c75c4246 ("drm/i915: Introduce per-engine workarounds") |
| 25d140faaa25 ("drm/i915: Record GT workarounds in a list") |
| 3800960afe15 ("drm/i915: Complete the fences as they are cancelled due to wedging") |
| d53db442db36 ("drm/i915: Move display device info capabilities to its own struct") |
| e1bf094b3c75 ("drm/i915: Add HAS_DISPLAY() and use it") |
| b9f78d675230 ("drm/i915/selftests: Fix live_workarounds to actually do resets") |
| 8d2f6e2f2721 ("drm/i915/selftests: Extract spinner code") |
| 168243c18010 ("drm/i915/dsc: Define & Compute VESA DSC params") |
| a4a157777c80 ("drm/i915/dp: Compute DSC pipe config in atomic check") |
| 7b610f1fbed2 ("drm/i915/dp: Add DSC params and DSC config to intel_crtc_state") |
| ff43bc379e16 ("drm/i915: Move ddb/wm programming into plane update/disable hooks on skl+") |
| 51de9c6d2559 ("drm/i915: Don't pass dev_priv around so much") |
| 8315847bf4df ("drm/i915: Clean up skl+ vs. icl+ watermark computation") |
| 6a3c910b081d ("drm/i915: Pass the entire skl_plane_wm to skl_compute_transition_wm()") |
| 14a43062b903 ("drm/i915: Remove some useless zeroing on skl+ wm calculations") |
| ce110ec311e9 ("drm/i915: Fix latency==0 handling for level 0 watermark on skl+") |
