| 6e9f06ee6c95 ("Revert "parisc: Use ldcw instruction for SMP spinlock release barrier"") |
| 462fb756c7de ("Revert "parisc: Drop LDCW barrier in CAS code when running UP"") |
| e6eb5fe9123f ("parisc: Drop LDCW barrier in CAS code when running UP") |
| 9e5c602186a6 ("parisc: Use ldcw instruction for SMP spinlock release barrier") |
| 86d4d068df57 ("parisc: Revert "Release spinlocks using ordered store"") |
| 3847dab77421 ("parisc: Add alternative coding infrastructure") |
| 4dd5b673fa62 ("parisc: Purge TLB entries after updating page table entry and set page accessed flag in TLB handler") |
| d27dfa13b9f7 ("parisc: Release spinlocks using ordered store") |
| 32a7901f6d1d ("parisc: Remove PTE load and fault check from L2_ptep macro") |
| c8921d72e390 ("parisc: Fix and improve kernel stack unwinding") |
| 3b885ac1dc35 ("parisc: Remove unnecessary barriers from spinlock.h") |
| 7797167ffde1 ("parisc: Remove ordered stores from syscall.S") |
| fedb8da96355 ("parisc: Define mb() and add memory barriers to assembler unlock sequences") |
| 8d73b1807961 ("parisc: Fix section mismatches") |
| 0adb24e03a12 ("parisc: Fix ordering of cache and TLB flushes") |
| 88776c0e70be ("parisc: Fix alignment of pa_tlb_lock in assembly on 32-bit SMP kernel") |
| 9352aeada4d8 ("Revert "parisc: Re-enable interrupts early"") |
