| 4d8ed54c0447 ("drm/i915: Split color mgmt based on single vs. double buffered registers") |
| 87cefd57c88a ("drm/i915: Pull GAMMA_MODE write out from haswell_load_luts()") |
| 23b03a272c2b ("drm/i915: Constify the state arguments to the color management stuff") |
| 5f4f3e386b36 ("drm/i915: Precompute gamma_mode") |
| e4c0d5314ded ("drm/i915: Apply LUT validation checks to platforms more accurately (v3)") |
| 85e2d61e4976 ("drm/i915: Validate userspace-provided color management LUT's (v4)") |
| 129fe7516b23 ("drm/i915/color: switch to kernel types") |
| 0258404f9d38 ("drm/i915: start moving runtime device info to a separate struct") |
| 167bc759e823 ("drm/i915: Restrict PSMI context load w/a to Haswell GT1") |
| a489334941d4 ("drm/i915: Fix Cherryview oops on boot") |
| f513ac76530c ("drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines") |
| 57b19d55189b ("drm/i915/icl: Record the valid VDBoxes with SFC capability") |
| cf819eff907a ("drm/i915: replace IS_GEN<N> with IS_GEN(..., N)") |
| 302da0cdf784 ("drm/i915: Use intel_ types more consistently for color management code (v2)") |
| d15f9cdd59ba ("drm/i915/icl: Do not change reserved registers related to PSR2") |
| 517974992593 ("drm/i915: Allocate a common scratch page") |
| 452420d22d5b ("drm/i915: Fuse per-context workaround handling with the common framework") |
| 69bcdecf1af5 ("drm/i915: Move register white-listing to the common workaround framework") |
| 28d6ccce73be ("drm/i915/selftests: Add tests for GT and engine workaround verification") |
| 094304beb4e1 ("drm/i915: Verify GT workaround state after GPU init") |
| 4a15c75c4246 ("drm/i915: Introduce per-engine workarounds") |
| 25d140faaa25 ("drm/i915: Record GT workarounds in a list") |
| e1bf094b3c75 ("drm/i915: Add HAS_DISPLAY() and use it") |
| b9f78d675230 ("drm/i915/selftests: Fix live_workarounds to actually do resets") |
| 8d2f6e2f2721 ("drm/i915/selftests: Extract spinner code") |
| 0e39037b3165 ("drm/i915: Cache the error string") |
| 95fd94a645f7 ("drm/i915: avoid rebuilding i915_gpu_error.o on version string updates") |
| 8f19b401a6fc ("drm/i915: Make CHICKEN_TRANS reg not depend on enum value") |
| fb6f0b64e455 ("drm/i915: Prevent machine hang from Broxton's vtd w/a and error capture") |
| 03981c6ebec4 ("drm/i915: Disable LP3 watermarks on all SNB machines") |
| cb8ef723ab81 ("drm/i915/gen9_bc: Work around DMC bug zeroing power well requests") |
| 745aa6cdee6b ("drm/i915: Fix icl workarounds whitespaces") |
| 85f04aa569ad ("drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA") |
| 8d3bf1a3959f ("drm/i915: Move drm_vblank_init() to i915_load_modeset_init()") |
| 55f99bf2a9c3 ("drm/i915/ringbuffer: Delay after EMIT_INVALIDATE for gen4/gen5") |
| f57f9371e285 ("drm/i915/icl: WaAllowUMDToModifySamplerMode") |
| 6a00b8feb86d ("drm/i915/icl: WaAllowUMDToModifyHalfSliceChicken7") |
| 1347d3ce5bbb ("drm/i915: Remove CNL from WA 827") |
| d521361755c2 ("drm/i915: Define WA 0870 and kill dead code.") |
| 3e68928b7d4c ("drm/i915/icl: Enable DC9 as lowest possible state during screen-off") |
| c5def85c0847 ("drm/i915/selftests: Test vm isolation") |
| 42882336e62a ("drm/i915/glk: Remove 99% limitation.") |
| 9e7833758b9f ("drm/i915: Prefer IS_GEN<n> check with bitmask.") |
| 9213e4f54444 ("drm/i915/icl: Store available engine masks in INTEL_INFO") |
| b1554e23ccb6 ("drm/i915/gen11: Program the scalers correctly for planar formats, v3.") |
| 1ab554b0099b ("drm/i915/gen11: Link nv12 Y and UV planes in the atomic state, v5.") |
| 6711bd730b38 ("drm/i915/gen11: Enable 6 sprites on gen11") |
| ac128918482d ("drm/i915: uncore_fw_domains_init sort platforms newer-to-older") |
| 210126bd807d ("drm/i915: digital_port_connected sort platforms newer-to-older") |
| bbb8a9d7e000 ("drm/i915: GEM_WARN_ON considered harmful") |