| 5bab858eee04 ("drm/amdgpu: add rlc iram and dram firmware support") |
| aa1faaa1fcd8 ("drm/amdgpu: upload mes firmware to gpu buffer") |
| b4df2823ec10 ("drm/amdgpu: check rlc_g firmware pointer is valid before using it") |
| 0753e56e9a01 ("drm/amdgpu: correct RLC firmwares loading sequence") |
| d549991ce5d5 ("drm/amdgpu: enable gfxoff feature for navi10 asic") |
| 6de40f02b355 ("drm/amdgpu: do autoload right after MEC loaded for SRIOV VF") |
| 1797ec7ffd1b ("drm/amdgpu: skip rlc ucode loading for SRIOV gfx10") |
| 02350f0bdf44 ("drm/amdgpu: Add ucode support for DMCUB") |
| 05ba0095fb7b ("drm/amdgpu: correct condition check for psp rlc autoload") |
| cc216214ac84 ("drm/amdgpu: remove special autoload handling for navi12") |
| e60cc94b268a ("drm/amdgpu: start autoload till RLCG fw for navi12") |
| b86f8d8b2bc0 ("drm/amdgpu: extend PSP FW loading support to 8 SDMA instances") |
| 8ac875db0fdc ("drm/amdgpu: disable gfxoff on navi10") |
| 6e72d8e9fb70 ("drm/amdgpu: add corresponding vcn ram ucode id") |
| 68c0798cd9f9 ("drm/amdgpu/psp: add new VCN RAM ucode id to psp") |
| 186b0ca28293 ("drm/amdgpu/ucode: add the definitions of MES ucode and ucode data") |
| a644d85a5cd4 ("drm/amdgpu: add gfx v10 implementation (v10)") |
| 119eb6db542f ("drm/amdgpu/psp: skip mec jt when autoload is enabled") |
| 4414ec6d14da ("drm/amdgpu/psp: update psp gfx interface to match with psp fw (v2)") |
| 1a5b4cca29ba ("drm/amdgpu/psp: start rlc autoload after psp recieved all gfx firmware") |
| 46ea9501fbc9 ("drm/amdgpu/psp: add structure to support load toc in psp (v2)") |
| 3880369f6a8e ("drm/amdgpu: Add new PSP cmd GFX_CMD_ID_PROG_REG") |
| 54eb4ed6072b ("drm/amdgpu: Fix NULL pointer when ta is missing") |
| 3ea8fb8c803c ("drm/amdgpu: add psp v11 ras callback") |
| 5e5d3154575c ("drm/amdgpu: add psp ras subsystem infrastructure (v2)") |
| 7da674535da9 ("drm/amdgpu: add psp ras callback func and macro") |
| be4630d96258 ("drm/amdgpu/psp: make get_fw_type and prep_cmd_buf to be common interfaces") |
| 0db2a8cd6259 ("drm/amdgpu/psp: update the naming of GFX_FW_TYPE_RLC_RESTORE_LIST_CNTL") |
| 1b3f6bc96883 ("drm/amdgpu: increase the MAX ring number") |
| e27a73d1305f ("drm/amdgpu/psp: Correct and refine the vmr support. (v2)") |
| 5ec996dfb6a1 ("drm/amdgpu/psp: Add support VMR ring for VF") |
| d63cda5bfcd3 ("drm/amdgpu/psp: Get psp fw version through reading register") |
| 88dfc9a3dd47 ("drm/amdgpu: separate amdgpu_rlc into a single file") |
| fdb81fd788a7 ("drm/amdgpu: unify rlc function into structure") |
| 593caa07ad6a ("drm/amdgpu/psp: update topology info structures") |
| dd3c45d30622 ("drm/amdgpu/psp: add get_node_id function") |
| 3e2e2ab55499 ("drm/amdgpu/psp: initialize xgmi session (v2)") |
| ca6e1e59a24b ("drm/amdgpu/psp: add helper function to invoke xgmi ta per ta cmd_id") |
| 97c8d171105d ("drm/amdgpu/psp: add helper function to load/unload xgmi ta") |
| f0cfa19579fa ("drm/amdgpu/psp: add structure for xgmi ta and its shared buffer") |
| 0b25cbf9c26c ("drm/amdgpu/psp: avoid hard-code fence value pre submission") |
| 50325c0be109 ("drm/amdgpu: remove set but not used variable 'ring' in psp_v11_0_ring_stop") |
| 7a3e0bb2a574 ("drm/amdgpu: Load fw between hw_init/resume_phase1 and phase2") |
| 0a4f25205ec3 ("drm/amdgpu: split ip hw_init into 2 phases") |
| 735f654e5dd1 ("drm/amdgpu: Remove amdgpu_ucode_fini_bo") |
| c8963ea4ce17 ("drm/amdgpu: Split amdgpu_ucode_init/fini_bo into two functions") |
| 744a522794bd ("drm/amd/pp: Allocate ucode bo in request_smu_load_fw") |
| 07da6aa47f84 ("drm/amdgpu: Don't reallocate ucode bo when suspend") |
| 9b008fb7ede3 ("drm/amdgpu: Remove FW_LOAD_DIRECT type support on VI") |
| 5e161e5442a8 ("drm/amd/pp: Refine smu7/8 request_smu_load_fw callback function") |
