| 5fea8645585f ("drm/i915/icl: Program TA_TIMING_PARAM registers") |
| e72cce531017 ("drm/i915/icl: Program DSI clock and data lane timing params") |
| 67551a703544 ("drm/i915/dsi: abstract dphy parameter init") |
| 2bf3f59daeee ("drm/i915/dsi: refactor bitrate calculations in intel_dsi_vbt_init()") |
| 70a7b83628fa ("drm/i915/icl: Program T_INIT_MASTER registers") |
| ba3df888be90 ("drm/i915/icl: Enable DDI Buffer") |
| 3f4b9d9d02c6 ("drm/i915/icl: DSI vswing programming sequence") |
| fc41001d9708 ("drm/i915/icl: Configure lane sequencing of combo phy transmitter") |
