| 6cfcd5563b4f ("clocksource/drivers/timer-ti-dm: Fix suspend and resume for am3 and am4") |
| aba1ad05da08 ("clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support") |
| feaa8baee82a ("bus: ti-sysc: Implement SoC revision handling") |
| 2b2f7def058a ("bus: ti-sysc: Add support for missing clockdomain handling") |
| d59b60564cbf ("bus: ti-sysc: Add generic enable/disable functions") |
| a54275f4ab20 ("bus: ti-sysc: Add quirk handling for external optional functional clock") |
| 42b9c5c99bfc ("bus: ti-sysc: Add support for early quirks based on register address") |
| 93de83a21e76 ("bus: ti-sysc: Manage clocks for the interconnect target module in all cases") |
| a3e92e7b32f2 ("bus: ti-sysc: Allocate mdata as needed and do platform data based init later") |
| 1a5cd7c23cc5 ("bus: ti-sysc: Enable all clocks directly during init to read revision") |
| d878970f6ce1 ("bus: ti-sysc: Add separate functions for handling clocks") |
| ff43728c4aa2 ("bus: ti-sysc: Move legacy platform data idling into separate functions") |
| 386cb76681ca ("bus: ti-sysc: Handle missed no-idle property in addition to no-idle-on-init") |
| b57250fa5eb3 ("ARM: OMAP2+: Allocate struct omap_hwmod based on dts data") |
| 513a4abb19d5 ("ARM: OMAP2+: Prepare class allocation for dynamically allocated modules") |
| 798bd175ab0d ("ARM: OMAP2+: Make interconnect target module allocation functions static") |
| 40d9f9124822 ("bus: ti-sysc: Defer suspend as needed") |
