| 7cfefab6563f ("clk: meson: axg-audio: add g12a reset support") |
| 282420eed23f ("clk: meson: axg-audio: migrate to the new parent description method") |
| 075001385c66 ("clk: meson: axg-audio: add g12a support") |
| 6d6d2a24b2c7 ("clk: meson: axg-audio: don't register inputs in the onecell data") |
| b18819c4acf1 ("clk: meson: axg_audio: replace prefix axg by aud") |
| e4c1e95facf9 ("dt-bindings: clock: axg-audio: unexpose controller inputs") |
| 889c2b7ec42b ("clk: meson: rework and clean drivers dependencies") |
| cb78ba76296e ("clk: meson: axg-audio does not require syscon") |
| 439a6bb5bfe7 ("clk: meson: ao-clkc: claim clock controller input clocks from DT") |
| 172e95346d5e ("clk: meson: axg-ao: add 32k generation subtree") |
| b249623fd147 ("clk: meson: gxbb-ao: replace cec-32k with the dual divider") |
| a8d552a63857 ("clk: meson: add dual divider clock driver") |
| f03566d0aa79 ("clk: meson: axg-audio: use the clk input helper function") |
| e456e6a12b7a ("clk: meson: add clk-input helper function") |
| 72dbb8c94d0d ("clk: meson: Add vid_pll divider driver") |
| 56dbabc0ff73 ("clk: meson: axg: round audio system master clocks down") |
| dd601dbc011e ("clk: meson: clk-pll: drop hard-coded rates from pll tables") |
| 87173557d2f6 ("clk: meson: clk-pll: remove od parameters") |
| 2303a9ca693e ("clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary") |
| e40c7e3cda07 ("clk: meson: clk-pll: add enable bit") |
