| 7eb31a0bb2c1 ("drm/i915: Split the gamma/csc enable bits from the plane_ctl() function") |
| c4aa2eca319c ("drm/i915/sprite: switch to kernel types") |
| cf819eff907a ("drm/i915: replace IS_GEN<N> with IS_GEN(..., N)") |
| d15f9cdd59ba ("drm/i915/icl: Do not change reserved registers related to PSR2") |
| 517974992593 ("drm/i915: Allocate a common scratch page") |
| 69bcdecf1af5 ("drm/i915: Move register white-listing to the common workaround framework") |
| 28d6ccce73be ("drm/i915/selftests: Add tests for GT and engine workaround verification") |
| 094304beb4e1 ("drm/i915: Verify GT workaround state after GPU init") |
| 4a15c75c4246 ("drm/i915: Introduce per-engine workarounds") |
| 25d140faaa25 ("drm/i915: Record GT workarounds in a list") |
| e1bf094b3c75 ("drm/i915: Add HAS_DISPLAY() and use it") |
| b9f78d675230 ("drm/i915/selftests: Fix live_workarounds to actually do resets") |
| 8d2f6e2f2721 ("drm/i915/selftests: Extract spinner code") |
| 83234d13f9fd ("drm/i915: Reorganize plane register writes to make them more atomic") |
| 0e39037b3165 ("drm/i915: Cache the error string") |
| 95fd94a645f7 ("drm/i915: avoid rebuilding i915_gpu_error.o on version string updates") |
| 8f19b401a6fc ("drm/i915: Make CHICKEN_TRANS reg not depend on enum value") |
| fb6f0b64e455 ("drm/i915: Prevent machine hang from Broxton's vtd w/a and error capture") |
| 03981c6ebec4 ("drm/i915: Disable LP3 watermarks on all SNB machines") |
| cb8ef723ab81 ("drm/i915/gen9_bc: Work around DMC bug zeroing power well requests") |
| 745aa6cdee6b ("drm/i915: Fix icl workarounds whitespaces") |
| 85f04aa569ad ("drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA") |
| ca0026790efa ("drm/i915: Always write both TILEOFF and LINOFF plane registers") |
| 07464c7c0cf7 ("drm/i915: Clean up skl+ PLANE_POS vs. scaler handling") |
| 7b012bd62db9 ("drm/i915: Polish the skl+ plane keyval/msk/max register setup") |
| 8d3bf1a3959f ("drm/i915: Move drm_vblank_init() to i915_load_modeset_init()") |
| d0105af93976 ("drm/i915: Clean up skl_program_scaler()") |
| e69b348a7adb ("drm/i915: Nuke posting reads from plane update/disable funcs") |
| 55f99bf2a9c3 ("drm/i915/ringbuffer: Delay after EMIT_INVALIDATE for gen4/gen5") |
| bfe60a0272dd ("drm/i915/icl: Enable Plane Input CSC for YUV to RGB Conversion") |
| f57f9371e285 ("drm/i915/icl: WaAllowUMDToModifySamplerMode") |
| 6a00b8feb86d ("drm/i915/icl: WaAllowUMDToModifyHalfSliceChicken7") |
| 1347d3ce5bbb ("drm/i915: Remove CNL from WA 827") |
| d521361755c2 ("drm/i915: Define WA 0870 and kill dead code.") |
| 3e68928b7d4c ("drm/i915/icl: Enable DC9 as lowest possible state during screen-off") |
| 77cac774b2fa ("drm/i915: Do not program aux plane offsets on gen11+") |
| 42882336e62a ("drm/i915/glk: Remove 99% limitation.") |
| 9e7833758b9f ("drm/i915: Prefer IS_GEN<n> check with bitmask.") |
| 1e364f9008a7 ("drm/i915/gen11: Program the Y and UV plane for planar mode correctly, v3.") |
| cb2458baf8b5 ("drm/i915/gen11: Program the chroma upsampler for HDR planes.") |
| b1554e23ccb6 ("drm/i915/gen11: Program the scalers correctly for planar formats, v3.") |
| 1ab554b0099b ("drm/i915/gen11: Link nv12 Y and UV planes in the atomic state, v5.") |
| 6711bd730b38 ("drm/i915/gen11: Enable 6 sprites on gen11") |
| ac128918482d ("drm/i915: uncore_fw_domains_init sort platforms newer-to-older") |
| 210126bd807d ("drm/i915: digital_port_connected sort platforms newer-to-older") |
| bbb8a9d7e000 ("drm/i915: GEM_WARN_ON considered harmful") |
| f2bdd112685c ("drm/i915: Pass crtc_state to update_scanline_offset") |
| 4207c8b9914f ("drm/i915: Always read out M2_N2 in intel_cpu_transcoder_get_m_n, v2.") |
| 4c35475485c1 ("drm/i915: Make intel_dp_set_m_n take crtc_state") |
| 33b7f3ee6e00 ("drm/i915: Add CRTC output format YCBCR 4:2:0") |
