| 98bca69b7117 ("drm/bridge: tc358767: Use DP nomenclature") |
| e7dc8d40eea4 ("drm/bridge: tc358767: Avoid drm_dp_link helpers") |
| fd70c7755bf0 ("drm/bridge: tc358767: fix max_tu_symbol value") |
| d174db0788b4 ("drm/bridge: tc358767: Drop unnecessary 8 byte buffer") |
| 6d0c38315915 ("drm/bridge: tc358767: Drop custom tc_write()/tc_read() accessors") |
| 3f072c304c0a ("drm/bridge: tc358767: Simplify tc_set_video_mode()") |
| aa92213f388b ("drm/bridge: tc358767: Simplify polling in tc_link_training()") |
| 93a105694f7d ("drm/bridge: tc358767: Simplify tc_poll_timeout()") |
| f25ee5017e4f ("drm/bridge: tc358767: add IRQ and HPD support") |
| af9526f262c0 ("drm/bridge: tc358767: add GPIO & interrupt registers") |
| 0cdb42f313e0 ("drm/bridge: tc358767: remove tc_connector_best_encoder") |
| 4647a64fd56a ("drm/bridge: tc358767: use bridge mode_valid") |
| f9538357760b ("drm/bridge: tc358767: clean-up link training") |
| 0bf251465113 ("drm/bridge: tc358767: cleanup LT result check") |
| 0776a269d725 ("drm/bridge: tc358767: use more reliable seq when finishing LT") |
| 31b4c8848a89 ("drm/bridge: tc358767: remove unnecessary msleep") |
| 67bca92fa830 ("drm/bridge: tc358767: ensure DP is disabled before LT") |
| 1c928267b187 ("drm/bridge: tc358767: disable only video stream in tc_stream_disable") |
| cb3263b2df97 ("drm/bridge: tc358767: add link disable function") |
| bb24836869a7 ("drm/bridge: tc358767: move PXL PLL enable/disable to stream enable/disable") |
| 80d57245063f ("drm/bridge: tc358767: split stream enable/disable") |
| 5761a259aa9e ("drm/bridge: tc358767: move video stream setup to tc_main_link_stream") |
| ca342386a9b3 ("drm/bridge: tc358767: cleanup aux_link_setup") |
| e5607637c461 ("drm/bridge: tc358767: cleanup spread & scrambler_dis") |
| 4b30bf41e11f ("drm/bridge: tc358767: fix ansi 8b10b use") |
| c28d14849d37 ("drm/bridge: tc358767: reset voltage-swing & pre-emphasis") |
| 7923e09c7a76 ("drm/bridge: tc358767: fix output H/V syncs") |
| 51b9e62eb695 ("drm/bridge: tc358767: reject modes which require too much BW") |
| 9a63bd6fe1b5 ("drm/bridge: tc358767: fix initial DP0/1_SRCCTRL value") |
| 4d9d54a73043 ("drm/bridge: tc358767: fix single lane configuration") |
| adf4109896bb ("drm/bridge: tc358767: add defines for DP1_SRCCTRL & PHY_2LANE") |
