| b4734f43f3ca ("drm: rcar-du: Use LVDS PLL clock as dot clock when possible") | |
| 9fe50e64fac7 ("drm: rcar-du: Rename and document dpll_ch field") | |
| 7281e6c6a5bd ("drm: rcar-du: Rework clock configuration based on hardware limits") | |
| 4e86c208ddf2 ("drm: rcar-du: Support interlaced video output through vsp1") |