blob: 0a9facc82fb423c9838957a35b9688c0a4ce8676 [file] [log] [blame]
b5acec09e259 ("ARM: dts: dra7: Add properties to enable PCIe x2 lane mode")
6d0af44a82be ("ARM: dts: dra7: Fix up unaligned access setting for PCIe EP")