| d720e64150c7 ("iommu/arm-smmu: Ensure 64-bit I/O accessors are available on 32-bit CPU") |
| ba7e4a08bbf7 ("iommu/arm-smmu: Add context init implementation hook") |
| 62b993a36e4c ("iommu/arm-smmu: Add reset implementation hook") |
| 3995e18689fd ("iommu/arm-smmu: Add configuration implementation hook") |
| 6d7dff62afb0 ("iommu/arm-smmu: Move Secure access quirk to implementation") |
| fc058d37b345 ("iommu/arm-smmu: Add implementation infrastructure") |
| c5fc64881f07 ("iommu/arm-smmu: Rename arm-smmu-regs.h") |
| 00320ce65058 ("iommu/arm-smmu: Abstract GR0 accesses") |
| 19713fd40df8 ("iommu/arm-smmu: Abstract context bank accesses") |
| aadbf2143aeb ("iommu/arm-smmu: Abstract GR1 accesses") |
| 6100576284e9 ("iommu/arm-smmu: Get rid of weird "atomic" write") |
| 71e8a8cdaff9 ("iommu/arm-smmu: Split arm_smmu_tlb_inv_range_nosync()") |
| 490325e0c123 ("iommu/arm-smmu: Rework cb_base handling") |
| 620565a76bb3 ("iommu/arm-smmu: Convert context bank registers to bitfields") |
| 5114e96cb27e ("iommu/arm-smmu: Convert GR1 registers to bitfields") |
| 0caf5f4e84fe ("iommu/arm-smmu: Convert GR0 registers to bitfields") |
| 353b325047fd ("iommu/arm-smmu: Mask TLBI address correctly") |
| 4e4abae311e4 ("iommu/arm-smmu: Avoid constant zero in TLBI writes") |
| bc580b56cb78 ("iommu/arm-smmu: Log CBFRSYNRA register on context fault") |
| b77cf11f0941 ("iommu: Allow io-pgtable to be used outside of drivers/iommu/") |
| 89cddc563743 ("iommu/arm-smmu: Add support for qcom,smmu-v2 variant") |
| d4a44f0750bb ("iommu/arm-smmu: Invoke pm_runtime across the driver") |
| 96a299d24cfb ("iommu/arm-smmu: Add pm_runtime/sleep ops") |
| 44f6876a00e8 ("iommu/arm-smmu: Support non-strict mode") |
| 7d321bd35425 ("iommu/arm-smmu: Ensure that page-table updates are visible before TLBI") |
