| 05e31dd78e26 ("drm/i915/tgl: Fix TC-cold block/unblock sequence") |
| 3c02934b24e3 ("drm/i915/tc/tgl: Implement TC cold sequences") |
| feb7e0ef5ff8 ("drm/i915/tc/icl: Implement TC cold sequences") |
| f8bb28e63a1e ("drm/i915/display: Split hsw_power_well_enable() into two") |
| 8afb292839bb ("drm/i915/display/tc: Make WARN* drm specific where drm_priv ptr is available") |
| d6e53851ecc8 ("drm/i915/display_power: use intel_de_*() functions for register access") |
| 569caa65a495 ("drm/i915/power: convert to struct drm_device macros in display/intel_display_power.c") |
| b69fa3610b15 ("drm/i915/icl: Cleanup combo PHY aux power well handlers") |
| e8ab8d669d04 ("drm/i915/ehl: Define EHL powerwells independently of ICL") |
| 3fa01d642fa7 ("drm/i915/tgl: Program BW_BUDDY registers during display init") |
| 1c4d821db919 ("drm/i915/tgl: Switch between dc3co and dc5 based on display idleness") |
| 4645e906f2d4 ("drm/i915/tgl: Enable DC3CO state in "DC Off" power well") |
| 19c79ff82b4a ("drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask") |
| 4fb8783165b7 ("drm/i915/display: abstract all vgaarb access to intel_vga.[ch]") |
| 3b51be4e4061 ("drm/i915/tc: Update DP_MODE programming") |
| 27ffe6e570aa ("drm/i915/tgl: Check the UC health of tc controllers after power on") |
| 8aaf5cbda8f1 ("drm/i915/icl: Unify disable and enable phy clock gating functions") |
| 31d9ae9d7342 ("drm/i915/tgl: Finish modular FIA support on registers") |
| 6cd02e77757a ("drm/i915: pass i915 to intel_modeset_init() and intel_modeset_init_hw()") |
| e1a3d9895ddc ("drm/i915: abstract intel_mode_config_init() from intel_modeset_init()") |
| 064bd628fde6 ("drm/i915: abstract intel_panel_sanitize_ssc() from intel_modeset_init()") |
| 9980c3c11060 ("drm/i915: pass i915 to intel_modeset_driver_remove()") |
| 5bcd53aa39f3 ("drm/i915: pass i915 to i915_driver_modeset_probe()") |
| 2d6f6f359fd8 ("drm/i915: add i915_driver_modeset_remove()") |
| a6e58d9a2e04 ("drm/i915/dsb: Check DSB engine status.") |
| 061489c65ff5 ("drm/i915/dsb: single register write function for DSB.") |
| 67f3b58f3bac ("drm/i915/dsb: DSB context creation.") |
| ef404bc65920 ("drm/i915: stop conflating HAS_DISPLAY() and disabled display") |
| a2b69ea4d26d ("drm/i915: introduce INTEL_DISPLAY_ENABLED()") |
| 8d8b00318593 ("drm/i915: convert device info num_pipes to pipe_mask") |
| 249778704c01 ("drm/i915: add INTEL_NUM_PIPES() and use it") |
| c26a058680dc ("drm/i915: Use a high priority wq for nonblocking plane updates") |
| 8a84bacba19c ("drm/i915: Align power domain names with port names") |
| 99389390fef5 ("drm/i915/tgl: Implement TGL DisplayPort training sequence") |
| 99fc38b12095 ("drm/i915: Add transcoder restriction to PSR2") |
| 4ab4fa103217 ("drm/i915/psr: Make PSR registers relative to transcoders") |
