| 22ca75ea6a28 ("drm/amdgpu/swsmu/renoir: simplify sensor handling (v2)") |
| fecc72f181b5 ("drm/amd/pm/swsmu/smu12/renoir_ppt: Demote kernel-doc formatting abuse") |
| b49dc928f5a6 ("drm/amdgpu/swsmu: implement power metrics for RENOIR") |
| 61426114f246 ("drm/amdgpu/swsmu: implement voltage metrics for RENOIR") |
| e098bc9612c2 ("drm/amd/pm: optimize the power related source code layout") |
| fceafc9b7b39 ("drm/amd/powerplay: maximum the code sharing around metrics table retrieving") |
| a9c75edcbe7c ("drm/amd/powerplay: update the metrics table cache interval as 1ms") |
| bf1102877751 ("drm/amd/powerplay: add control method to bypass metrics cache on Vega12") |
| 740dce9517cb ("drm/amd/powerplay: add control method to bypass metrics cache on Vega20") |
| 2ba38817219b ("drm/amd/powerplay: add control method to bypass metrics cache on Renoir") |
| 60ae4d67ee6d ("drm/amd/powerplay: add control method to bypass metrics cache on Sienna Cichlid") |
| 62d351632db8 ("drm/amd/powerplay: add control method to bypass metrics cache on Navi10") |
| 345fcb02d9ec ("drm/amd/powerplay: add control method to bypass metrics cache on Arcturus") |
| 0fbc6533de67 ("drm/amd/powerplay: add Vega12 support for gpu metrics export") |
| e467c3a9f4ed ("drm/amd/powerplay: add Vega20 support for gpu metrics export") |
| 95868b85764a ("drm/amd/powerplay: add Renoir support for gpu metrics export(V2)") |
| 8ca78a0a0e77 ("drm/amd/powerplay: add Sienna Cichlid support for gpu metrics export") |
| 6d4ff50a2774 ("drm/amd/powerplay: add Navi1x support for gpu metrics export") |
| 14a12beab8b9 ("drm/amd/powerplay: update the data structure for NV12 SmuMetrics") |
| f1c378593153 ("drm/amd/powerplay: add Arcturus support for gpu metrics export") |
| e4c9200df510 ("drm/amd/powerplay: implement SMU V11 common APIs for retrieving link speed/width") |
| bc50ca291e5e ("drm/amdgpu/sienna_cichlid: add SMU i2c support (v2)") |
| 1bc734759f28 ("drm/amdgpu/navi1x: add SMU i2c support (v2)") |
| 66c868282f91 ("drm/amd/powerplay: move SMC message issuing APIs to smu_cmn.c") |
| c1b353b7eac5 ("drm/amd/powerplay: update the tables init related") |
| caad2613dc4b ("drm/amd/powerplay: move table setting common code to smu_cmn.c") |
| e7a95eea2250 ("drm/amd/powerplay: maximum code sharing around watermarks setting") |
| a7bae0619903 ("drm/amd/powerplay: move more APIs to smu_cmn.c") |
| af5ba6d21a70 ("drm/amd/powerplay: common API for disabling all features with exception") |
| 7dbf78051f75 ("drm/amd/powerplay: move ppfeature mask setting to smu_cmn.c") |
| 28251d726b2b ("drm/amd/powerplay: implement smu_cmn_get_enabled_mask() for all ASICs") |
| b4bb3aaf04af ("drm/amd/powerplay: move dpm feature enablement checking to smu_cmn.c") |
| 4d942ae349bb ("drm/amd/powerplay: move dpm feature support checking to smu_cmn.c") |
| d23c3ccc2176 ("drm/amd/powerplay: move clock dpm enablement check to smu_v11/v12") |
| 8264ee69f0d8 ("drm/amd/powerplay: drop unused code") |
| 6c339f37f1cd ("drm/amd/powerplay: unify swSMU index to asic specific index mapping") |
| 443c7f3c3641 ("drm/amdgpu: add read amdgpu_gfxoff status in debugfs") |
| d51dc6132795 ("drm/amd/powerplay: set VCN1 pg only for sienna_cichlid") |
| 3cd7e415aea4 ("drm/amd/powerplay: drop unused code around thermal range setting") |
| 1e1964b777ce ("drm/amd/powerplay: maximum the code sharing on thermal irq setting") |
| 0540ecedcba9 ("drm/amd/powerplay: sort the call flow on temperature ranges retrieving") |
| 2b1f12a2da04 ("drm/amd/powerplay: correct Sienna Cichlid temperature limit settings") |
| cbf3f132fe5d ("drm/amd/powerplay: correct Navi1X temperature limit settings") |
| 778f8e6afea6 ("drm/amd/powerplay: drop unnecessary wrapper around pcie parameters setting") |
| 42f75c849f17 ("drm/amd/powerplay: drop unused APIs and parameters") |
| 982d68b09358 ("drm/amd/powerplay: drop smu_v12_0.c unnecessary wrapper V2") |
| d56ff011367e ("drm/amd/powerplay: drop unnecessary wrappers") |
| 10e96d897329 ("drm/amd/powerplay: drop Sienna Cichlid specific set_soft_freq_limited_range") |
| b64d86889f1e ("drm/amd/powerplay: add new UMD pstate data structure") |
| 90a89c316e64 ("drm/amd/powerplay: update Sienna Cichlid default dpm table setup") |
