| 240abb3c76ff ("drm/i915/dg1: Add DG1 power wells") |
| b302a2e68807 ("drm/i915/tgl: Make sure TC-cold is blocked before enabling TC AUX power wells") |
| 93e2323b5c85 ("drm/i915/rkl: Add power well support") |
| 3c02934b24e3 ("drm/i915/tc/tgl: Implement TC cold sequences") |
| feb7e0ef5ff8 ("drm/i915/tc/icl: Implement TC cold sequences") |
| f8bb28e63a1e ("drm/i915/display: Split hsw_power_well_enable() into two") |
| 8afb292839bb ("drm/i915/display/tc: Make WARN* drm specific where drm_priv ptr is available") |
| d6e53851ecc8 ("drm/i915/display_power: use intel_de_*() functions for register access") |
| 569caa65a495 ("drm/i915/power: convert to struct drm_device macros in display/intel_display_power.c") |
| cabeacd4cc13 ("drm/i915/dsc: fix DSC power domains for DSI") |
| b69fa3610b15 ("drm/i915/icl: Cleanup combo PHY aux power well handlers") |
| e8ab8d669d04 ("drm/i915/ehl: Define EHL powerwells independently of ICL") |
| 3fa01d642fa7 ("drm/i915/tgl: Program BW_BUDDY registers during display init") |
| 2225f3c6f1d7 ("drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi.") |
| 1326a92c3466 ("drm/i915: Perform automated conversions for crtc uapi/hw split, base -> hw.") |
| 2b808b3a27d1 ("drm/i915: Add aliases for uapi and hw to crtc_state") |
| 3558cafc31ce ("drm/i915: Handle a few more cases for crtc hw/uapi split, v3.") |
| 4e380d080be4 ("drm/i915: Stop frobbing crtc->base.mode") |
| 25f899544fb4 ("drm/i915: Nuke 'mode' argument to intel_get_load_detect_pipe()") |
| bb6ae9e653dc ("drm/i915: Allow planes to declare their minimum acceptable cdclk") |
| 1d5a95b5c943 ("drm/i915: Rework global state locking") |
| 73cefd903de7 ("drm/i915: add pipe id/name to pipe mismatch logs") |
| cbd9b9f2e7b1 ("drm/i915: remove extra new line on pipe_config mismatch") |
| a6c948f98239 ("drm/i915/display/icl: In port sync mode disable slaves first then master") |
| 51528afe7c5e ("drm/i915/display/icl: Disable transcoder port sync as part of crtc_disable() sequence") |
| eadf6f9170d5 ("drm/i915/display/icl: Enable master-slaves in trans port sync") |
| ba5f1ae95d28 ("drm/i915/display/icl: HW state readout for transcoder port sync config") |
| 705135bd734c ("drm/i915/display/icl: Enable TRANSCODER PORT SYNC for tiled displays across separate ports") |
| bfb926e32385 ("drm/i915/display/icl: Save Master transcoder in slave's crtc_state for Transcoder Port Sync") |
| 36b53a291b6a ("drm/i915: Make dirty_pipes refer to pipes") |
| 3abe897787c2 ("drm/i915: Prepare the mode readout for hw vs. uapi state split") |
| de3b67afc060 ("drm/i915: Prepare the connector/encoder mask readout for hw vs. uapi state split") |
| 4078c983feb9 ("drm/i915: Switch intel_legacy_cursor_update() to intel_ types") |
| 993254292b9e ("drm/i915: Refactor timestamping constants update") |
| 3e30d70805d5 ("drm/i915: Make .modeset_calc_cdclk() mandatory") |
| 131d3b1af105 ("drm/i915: Stop using drm_atomic_helper_check_planes()") |
| 3a612765f423 ("drm/i915: Remove cursor use of properties for coordinates") |
| d8bd3e157a17 ("drm/i915: Remove begin/finish_crtc_commit, v4.") |
| af9fbfa657c8 ("drm/i915: Introduce and use intel_atomic_crtc_state_for_each_plane_state.") |
| 9b000b47cc18 ("drm/i915/color: fix broken gamma state-checker during boot") |
| 1c4d821db919 ("drm/i915/tgl: Switch between dc3co and dc5 based on display idleness") |
| bdacf0871f87 ("drm/i915/tgl: Do modeset to enable and configure DC3CO exitline") |
| 4645e906f2d4 ("drm/i915/tgl: Enable DC3CO state in "DC Off" power well") |
| 19c79ff82b4a ("drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask") |
| 2850748ef876 ("drm/i915: Pull i915_vma_pin under the vm->mutex") |
| 11331125e148 ("drm/i915: Mark up address spaces that may need to allocate") |
| 5e053450c1c3 ("drm/i915: Only track bound elements of the GTT") |
| b290a78b5c3d ("drm/i915: Use helpers for drm_mm_node booleans") |
| 48c38154d539 ("drm/i915: use DRM_DEBUG_KMS() instead of drm_dbg(DRM_UT_KMS, ...)") |
| 0d52cc7e0311 ("drm/i915: use DRM_ERROR() instead of drm_err()") |