| 2ca73193ccab ("crypto: hisilicon/zip - fix some coding styles") |
| 3d29e98d1d75 ("crypto: hisilicon/qm - fix the process of register algorithms to crypto") |
| daa31783c0eb ("crypto: hisilicon/qm - fix the call trace when unbind device") |
| 64dfe49528d0 ("crypto: hisilicon/qm - register callback function to 'pci_driver.shutdown'") |
| e88dd6e1d837 ("crypto: hisilicon/qm - fix no stop reason when use 'hisi_qm_stop'") |
| dadbe4c11753 ("crypto: hisilicon/hpre - update debugfs interface parameters") |
| 6b534f7aaf0c ("crypto: hisilicon/sec2 - update debugfs interface parameters") |
| c31dc9fe165d ("crypto: hisilicon/qm - add DebugFS for xQC and xQE dump") |
| 6621e6492fbd ("crypto: hisilicon/zip - add debugfs for Hisilicon ZIP") |
| 64a6301ebee7 ("crypto: hisilicon/hpre - add debugfs for Hisilicon HPRE") |
| 0a3a3960210b ("crypto: hisilicon/qm - add debugfs to the QM state machine") |
| 8502652542c6 ("crypto: hisilicon/qm - add debugfs for QM") |
| 2c959a33f863 ("crypto: hisilicon/zip - Use temporary sqe when doing work") |
| dbdc1ec31fc0 ("crypto: hisilicon - add device error report through abnormal irq") |
| 3176637ac10e ("crypto: hisilicon - remove codes of directly report device errors through MSI") |
| 5308f6600a39 ("crypto: hisilicon - QM memory management optimization") |
| d9701f8d9b12 ("crypto: hisilicon - unify initial value assignment into QM") |
| b977e0300512 ("crypto: hisilicon - remove use_dma_api related codes") |
| 7ce396fa12a9 ("crypto: hisilicon - add FLR support") |
| b67202e8ed30 ("crypto: hisilicon/qm - add state machine for QM") |
| 20b291f51802 ("crypto: hisilicon - refactor module parameter pf_q_num related code") |
| cfd66a660f73 ("crypto: hisilicon/zip - modify the ZIP probe process") |
| 5f3a2a5d37ff ("crypto: hisilicon/hpre - modify the HPRE probe process") |
| 18614230f430 ("crypto: hisilicon/sec2 - modify the SEC probe process") |
| f037fc5f93f4 ("crypto: hisilicon/qm - stop qp by judging sq and cq tail") |
| 141876c252a4 ("crypto: hisilicon/sec2 - add controller reset support for SEC2") |
| 1f5c9f34f0cc ("crypto: hisilicon/hpre - add controller reset support for HPRE") |
| 84c9b7802b02 ("crypto: hisilicon/zip - add controller reset support for zip") |
| 6c6dd5802c2d ("crypto: hisilicon/qm - add controller reset interface") |
| 35ee280fb1fb ("crypto: hisilicon - add vfs_num module parameter for hpre/sec") |
| cd1b7ae3435c ("crypto: hisilicon - unify SR-IOV related codes into QM") |
| 619e464ae22a ("crypto: hisilicon - put vfs_num into struct hisi_qm") |
| 0b5e43bc1258 ("crypto: hisilicon/sec2 - Add new create qp process") |
| 0f4146fadc58 ("crypto: hisilicon/hpre - Optimize finding hpre device process") |
| 18f1ab3f74d6 ("crypto: hisilicon/zip - Use hisi_qm_alloc_qps_node() when init ctx") |
| 3f1ec97aacf1 ("crypto: hisilicon/qm - Put device finding logic into QM") |
| 8824bc5ed1e7 ("crypto: hisilicon/sec2 - Add iommu status check") |
| a13c97118749 ("crypto: hisilicon/sec2 - Add workqueue for SEC driver.") |
| 57ca81245f4d ("crypto: hisilicon - Use one workqueue per qm instead of per qp") |
| 9e00df7156e4 ("crypto: hisilicon - register zip engine to uacce") |
| 18bead70e991 ("crypto: hisilicon - Remove module_param uacce_mode") |
| f826e6efb42b ("crypto: hisilicon - Unify error detect process into qm") |
| de3daf4b4ad5 ("crypto: hisilicon - Configure zip RAS error type") |
| eaebf4c3b103 ("crypto: hisilicon - Unify hardware error init/uninit into QM") |
| 63fabc87a01d ("crypto: hisilicon - add branch prediction macro") |
| 02ab994635eb ("crypto: hisilicon - Fixed some tiny bugs of HPRE") |
| 2f072d75d1ab ("crypto: hisilicon - Add aead support on SEC2") |
| 473a0f9662d4 ("crypto: hisilicon - redefine skcipher initiation") |
| b9c8d897a0c6 ("crypto: hisilicon - Add branch prediction macro") |
| 310ea0ac7207 ("crypto: hisilicon - Add callback error check") |
