blob: 9fc79903d380c636c4b91fc41f5726b3044ff3ff [file] [log] [blame]
35c1b48d27da ("iommu/mediatek: Add REG_MMU_WR_LEN_CTRL register definition")
37276e00da7d ("iommu/mediatek: Add sub_comm id in translation fault")
b053bc7183c8 ("iommu/mediatek: Move inv_sel_reg into the plat_data")
4bb2bf4c6ad3 ("iommu/mediatek: Setting MISC_CTRL register")
6b717796227e ("iommu/mediatek: Use a u32 flags to describe different HW features")
75eed350877c ("iommu/mediatek: Rename the register STANDARD_AXI_MODE(0x48) to MISC_CTRL")