| 9f9e59a48095 ("PCI: dwc: Support multiple ATU memory regions") |
| 9fff3256f93d ("PCI: dwc: Restore ATU memory resource setup to use last entry") |
| aeaa0bfe8965 ("PCI: dwc: Move N_FTS setup to common setup") |
| d439e7edd134 ("PCI: dwc/intel-gw: Drop unused max_width") |
| 441e48fdf0b4 ("PCI: dwc: Set PORT_LINK_DLL_LINK_EN in common setup code") |
| 39bc5006501c ("PCI: dwc: Centralize link gen setting") |
| 84667a416d42 ("PCI: dwc/tegra: Use common Designware port logic register definitions") |
| fb7652327101 ("PCI: dwc: Remove hardcoded PCI_CAP_ID_EXP offset") |
| cff9244432e8 ("PCI: dwc: Ensure FAST_LINK_MODE is cleared") |
| 6ffc02d23631 ("PCI: dwc: Add a 'num_lanes' field to struct dw_pcie") |
| 2ef6b06a0475 ("PCI: dwc: Simplify config space handling") |
| 0f71c60ffd26 ("PCI: dwc: Remove storing of PCI resources") |
| c2b0c098fbd1 ("PCI: dwc: Use generic config accessors") |
| 7975c8cc8ed8 ("PCI: dwc: Remove dwc specific config accessor ops") |
| 27e7ed018113 ("PCI: dwc: Add a default pci_ops.map_bus for root port") |
| 444ddca52484 ("PCI: dwc: Allow overriding bridge pci_ops") |
| 49e427e6bdd1 ("Merge branch 'pci/host-probe-refactor'") |
