| a78c6f5956a9 ("RISC-V: Make sure memblock reserves the memory containing DT") |
| 2d2682512f0f ("riscv: Allow device trees to be built into the kernel") |
| 335b139057ef ("riscv: Add SOC early init support") |
| 6bd33e1ece52 ("riscv: add nommu support") |
| fcdc65375186 ("riscv: provide native clint access for M-mode") |
| 4f9bbcefa142 ("riscv: add support for MMIO access to the timer registers") |
| 8bf90f320d9a ("riscv: implement remote sfence.i using IPIs") |
| 3b03ac6bbd6e ("riscv: poison SBI calls for M-mode") |
| a4c3733d32a7 ("riscv: abstract out CSR names for supervisor vs machine mode") |
| 0c3ac28931d5 ("riscv: separate MMIO functions into their own header file") |
