| c1e3417558be ("drm/amd/display: Indirect reg read macro with shift and mask") | |
| 2c1a180ac12d ("drm/amd/display: Double buffer dcn2 Gamut Remap") | |
| d9eb70ae610f ("drm/amd/display: Fix double buffering in dcn2 ICSC") | |
| e8027e08843f ("drm/amd/display: Add double buffering to dcn20 OCSC") | |
| f432f0060f05 ("drm/amd/display: Use dcn1 Optimal Taps Get") | |
| d56eaa7cfb09 ("drm/amd/display: Add missing shifts and masks for dpp registers on dcn2") | |
| ff344c8d2a40 ("drm/amd/display: Reuse dcn2 registers") |