| d411cf02ed02 ("riscv: fix scratch register clearing in M-mode.") | |
| 9e80635619b5 ("riscv: clear the instruction cache and all registers when booting") | |
| accb9dbc4aff ("riscv: read the hart ID from mhartid on boot") | |
| a4c3733d32a7 ("riscv: abstract out CSR names for supervisor vs machine mode") |