| 474dadb8b0d5 ("drm/msm/a6xx: Add support for using system cache(LLC)") |
| 2fb7487aaf71 ("drm/msm: Get rid of the REG_ADRENO offsets") |
| d3a569fccfa0 ("drm/msm: a6xx: Use WHERE_AM_I for eligible targets") |
| 8907afb476ac ("drm/msm: Allow a5xx to mark the RPTR shadow as privileged") |
| 84c31ee16f90 ("drm/msm/a6xx: Add support for per-instance pagetables") |
| 933415e24bd0 ("drm/msm: Add support for private address space instances") |
| 15eb9ad073c0 ("drm/msm: Drop context arg to gpu->submit()") |
| cf655d615931 ("drm/msm: Add a context pointer to the submitqueue") |
| 0a48db562c62 ("drm/msm/adreno: fix probe without iommu") |
| f6828e0c4045 ("drm/msm: Disable the RPTR shadow") |
| 604234f33658 ("drm/msm: Enable expanded apriv support for a650") |
| 34221545d206 ("drm/msm: Split the a5xx preemption record") |
| 6f7cd6e40b94 ("drm/msm/a6xx: add module param to enable debugbus snapshot") |
| 352c83fb39ca ("drm/msm/gpu: make ringbuffer readonly") |
| 078e8f8ce8ad ("drm/msm: Fix setup of a6xx create_address_space.") |
| ccac7ce373c1 ("drm/msm: Refactor address space initialization") |
| 52da6d513183 ("drm/msm: Attach the IOMMU device during initialization") |
| d3b68ddf1d38 ("drm/msm/a4xx: add a405_registers for a405 device") |
| dc0fa5eb765d ("drm/msm/a4xx: add adreno a405 support") |
| 24e6938ec604 ("drm/msm/a6xx: update a6xx_hw_init for A640 and A650") |
| 29ac8979cdf7 ("drm/msm/a6xx: use msm_gem for GMU memory objects") |
