| 885eb3fad6ff ("drm/amdgpu: add gfx ip block for navy_flounder") |
| 026c396b41a4 ("drm/amdgpu: add ih ip block for navy_flounder") |
| fc8f07da1f47 ("drm/amdgpu: add gmc ip block for navy_flounder") |
| 8515e0a489e0 ("drm/amdgpu: add common ip block for navy_flounder") |
| 689dede0a0ee ("drm/amdgpu: enable 3D pipe 1 on Sienna_Cichlid") |
| 933c8a93e241 ("drm/amdgpu: add gfx ip block for sienna_cichlid (v3)") |
| 757b3af8ecb4 ("drm/amdgpu: add ih ip block for sienna_cichlid") |
| 0b3df16b5abc ("drm/amdgpu: add gmc ip block for sienna_cichlid") |
| 2e1ba10e9271 ("drm/amdgpu/soc15: add common ip block for sienna_cichlid") |
| 43a10b15d442 ("amd/amdgpu: Limit rlcg write registers only for nv12") |
| 1675c3a24d07 ("drm/amdgpu: stop disable the scheduler during HW fini") |
