| f2a6c81d02de ("drm/amdgpu: add gfx clock gating support for dimgrey_cavefish") |
| 6c266fb56cb8 ("drm/amdgpu: add gfx support for van gogh (v3)") |
| c5b6c914d2f3 ("drm/amdgpu: enable cp_fw_write_wait for navy_flounder") |
| 8f8463dddcad ("drm/amdgpu: force pa_sc_tile_steering_override to 0 for navy_flounder") |
| c4a8b802869c ("drm/amdgpu: configure navy_flounder gfx according to gfx 10.3") |
| 885eb3fad6ff ("drm/amdgpu: add gfx ip block for navy_flounder") |
| 026c396b41a4 ("drm/amdgpu: add ih ip block for navy_flounder") |
| fc8f07da1f47 ("drm/amdgpu: add gmc ip block for navy_flounder") |
| 8515e0a489e0 ("drm/amdgpu: add common ip block for navy_flounder") |
| d463d8c964dd ("drm/amdgpu/gfx10: add clockgating support for navy_flounder") |
| 650101930405 ("drm/amdgpu/gfx10: add support for navy_flounder firmware") |
| 8db1015b99b2 ("drm/amdgpu/sriov : Use kiq to do tlb invalidation for gfx10 on sriov") |
| 689dede0a0ee ("drm/amdgpu: enable 3D pipe 1 on Sienna_Cichlid") |
| 305401e77bf8 ("drm/amdgpu: force pa_sc_tile_steering_override to 0 for gfx10.3") |
| 263acd471f50 ("drm/amdgpu/gfx10: add gc golden setting for sienna_cichlid") |
| 58139a42dc08 ("drm/amdgpu/gfx10: change register configure for sienna_cichlid") |
| 933c8a93e241 ("drm/amdgpu: add gfx ip block for sienna_cichlid (v3)") |
| 757b3af8ecb4 ("drm/amdgpu: add ih ip block for sienna_cichlid") |
| 0b3df16b5abc ("drm/amdgpu: add gmc ip block for sienna_cichlid") |
| 2e1ba10e9271 ("drm/amdgpu/soc15: add common ip block for sienna_cichlid") |
| 2f7f522722ef ("drm/amdgpu/gfx10: add clockgating support for sienna_cichlid") |
| 6c06333073ac ("drm/amdgpu/gfx10: add support for sienna_cichlid firmware") |
| 43a10b15d442 ("amd/amdgpu: Limit rlcg write registers only for nv12") |
| 4189425d309a ("drm/amdgpu: add SPM golden settings for Navi10(v2)") |
| 1675c3a24d07 ("drm/amdgpu: stop disable the scheduler during HW fini") |
