| e456e6a12b7a ("clk: meson: add clk-input helper function") |
| 72dbb8c94d0d ("clk: meson: Add vid_pll divider driver") |
| 85ddc1a32cac ("clk: meson: remove unused clk-audio-divider driver") |
| 3054a55c5dd2 ("clk: meson: add axg audio sclk divider driver") |
| e8dd9207763e ("clk: meson: add triple phase clock driver") |
| 47f21315a6e4 ("clk: meson: add clk-phase clock driver") |
| 7813c14c9475 ("clk: meson: audio-divider is one based") |
| bae1106c37c6 ("clk: meson: mpll: add round closest support") |
| 22f65a389f61 ("clk: meson: use SPDX license identifiers consistently") |
| 88e2da81241e ("clk: meson: aoclk: refactor common code into dedicated file") |
| bdfa6394c229 ("clk: meson: migrate to devm_of_clk_add_hw_provider API") |
| 8289aafa4f36 ("clk: meson: improve pll driver results with frac") |
| 03a6519e9cd4 ("clk: meson: remove obsolete cpu_clk") |
| 722825dcd54b ("clk: meson: migrate plls clocks to clk_regmap") |
| 88a4e1283681 ("clk: meson: migrate the audio divider clock to clk_regmap") |
| c763e61ae8cb ("clk: meson: migrate mplls clocks to clk_regmap") |
| 2513a28c108b ("clk: meson: migrate muxes to clk_regmap") |
| f06ddd2852b3 ("clk: meson: migrate dividers to clk_regmap") |
| 7f9768a54051 ("clk: meson: migrate gates to clk_regmap") |
| 161f6e5baabd ("clk: meson: add regmap to the clock controllers") |
| 81c7fcac9b5f ("clk: meson: switch gxbb ao_clk to clk_regmap") |
| ea11dda9e091 ("clk: meson: add regmap clocks") |
| 14bd7b9c8d3f ("clk: meson: only one loop index is necessary in probe") |
| 332b32a23225 ("clk: meson: use devm_of_clk_add_hw_provider") |
| 323346d31d68 ("clk: meson: use dev pointer where possible") |
| 6c00e7b76021 ("clk: meson: add axg misc bit to the mpll driver") |
| 2fa9b361e500 ("clk: meson: axg: fix the od shift of the sys_pll") |
| 6b71aceceb09 ("clk: meson: axg: add the fractional part of the fixed_pll") |
| 07f45e2ecc1b ("clk: meson: gxbb: add the fractional part of the fixed_pll") |
| 3c4fe763d64d ("clk: meson: fix rate calculation of plls with a fractional part") |
| 69d92293274b ("clk: meson: add the gxl hdmi pll") |
| 7d3142e5d64a ("clk: meson: add od3 to the pll driver") |
| 4c5f67b7ea32 ("clk: meson: use the frac parameter width instead of a constant") |
| 94aa8a41f1bc ("clk: meson: remove unnecessary rounding in the pll clock") |
| 4ed98e9572ad ("clk: meson: remove useless pll rate params tables") |
| 840e1a73ccbb ("clk: meson: check pll rate param table before using it") |
| 9d548d803847 ("clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()") |
| 348c898cb897 ("Merge tag 'meson-clk-for-v4.16-3' of git://github.com/BayLibre/clk-meson into clk-meson") |
