| 6a3c910b081d ("drm/i915: Pass the entire skl_plane_wm to skl_compute_transition_wm()") |
| 14a43062b903 ("drm/i915: Remove some useless zeroing on skl+ wm calculations") |
| ce110ec311e9 ("drm/i915: Fix latency==0 handling for level 0 watermark on skl+") |
| b048a00b3d96 ("drm/i915/gen11: Handle watermarks correctly for separate Y/UV planes, v2.") |
| 24719e94ca2a ("drm/i915: Fix unsigned overflow when calculating total data rate, v2.") |
| 9e44b180f81b ("drm/i915: don't write PLANE_BUF_CFG twice every time") |
| cbacc79db6ac ("drm/i915: transition WMs ask for Selected Result Blocks") |
| aaa023782fda ("drm/i915: ddb_size is of u16 type") |
| 12a6c931beff ("drm/i915/icl: avoid unclaimed PLANE_NV12_BUF_CFG register") |
| 37cde11ba720 ("drm/i915/icl: update ddb entry start/end mask during hw ddb readout") |
| aa9664ffe863 ("drm/i915/icl: Enable 2nd DBuf slice only when needed") |
| 8b2b53ce94e8 ("drm/i915/skl+: make sure higher latency level has higher wm value") |
| 62027b7736d0 ("drm/i915/skl+: pass skl_wm_level struct to wm compute func") |
| 942aa2d0503d ("drm/i915/skl+: NV12 related changes for WM") |
| ddf343191420 ("drm/i915/skl+: support verification of DDB HW state for NV12") |
| b879d58ff31b ("drm/i915/skl+: refactor WM calculation for NV12") |
| 746edf8f66ed ("drm/i915/icl: Enable both DBuf slices during init") |
| ad186f3fd98a ("drm/i915/icl: implement the display init/uninit sequences") |
| 31dade7df460 ("drm/i915: Ignore minimum lines for level 0 in skl_compute_plane_wm, v2.") |
| 234059da0f33 ("drm/i915/icl: NV12 y-plane ddb is not in same plane") |
| 5b695aff3af5 ("drm/i915/icl: Fail flip if ddb allocated are less than min display buffer needed") |
| 9a9e3dfd6f8b ("drm/i915/icl: Don't allocate fixed bypass path blocks for ICL") |
| 53421c2fe99c ("drm/i915: Apply Display WA #1183 on skl, kbl, and cfl") |
| 2aa97491da8a ("drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL") |
| 2b58417ffbca ("drm/i915: Clean up some cdclk switch statements") |
| 9f817501bd7f ("drm/i915: Move rps.hw_lock to dev_priv and s/hw_lock/pcu_lock") |
| d46b00dc38c8 ("drm/i915: Separate RPS and RC6 handling for CHV") |
| 0d6fc92a73e0 ("drm/i915: Separate RPS and RC6 handling for VLV") |
| 960e54652cee ("drm/i915: Separate RPS and RC6 handling for gen6+") |
| 93564044fb2c ("drm/i915: Switch over to the LLC/eLLC hotspot avoidance hash mode for CCS") |
| 61843f0e6212 ("drm/i915: Name the IPS_PCODE_CONTROL bit") |
| 3e8ddd9e5071 ("drm/i915: Nuke some bogus tabs from the pcode defines") |
| ca47667f523e ("drm/i915/gen10: Calculate and enable transition WM") |
| 7e452fdbfca8 ("drm/i915/skl+: Optimize WM calculation") |
| 6c64dd378aca ("drm/i915/gen10: implement gen 10 watermarks calculations") |
| 2e2adb05736c ("drm/i915: Add render decompression support") |
| 54d20ed1fff2 ("drm/i915: Fix bad comparison in skl_compute_plane_wm, v2.") |
| b064be078453 ("drm/i915/skl+: unify cpp value in WM calculation") |
| 129eaa957dd5 ("drm/i915/skl+: WM calculation don't require height") |
| eac2cb81fb87 ("drm/i915: cleanup fixed-point wrappers naming") |
| eed02a7b5313 ("drm/i915: Always perform internal fixed16 division in 64 bits") |
| 07ab976d1971 ("drm/i915: take-out common clamping code of fixed16 wrappers") |
| 7b92c1bd0540 ("drm/i915: Avoid keeping waitboost active for signaling threads") |
| 46c26662d2fb ("drm/i915/cfl: Introduce Coffee Lake workarounds.") |
| 9a30a26122c3 ("Revert "drm/i915/skl: New ddb allocation algorithm"") |
| d8d4a512a6ff ("drm/i915/cnl: Implement CNL display init/unit sequence") |
| ef4f7a689ac5 ("drm/i915/cnl: Implement .set_cdclk() for CNL") |
| 945f2672ccbb ("drm/i915/cnl: Implement .get_display_clock_speed() for CNL") |
| 82525c17dedc ("drm/i915/cfl: Introduce Display workarounds for Coffee Lake.") |
| fce5adf568ab ("drm/i915: Fix SKL+ watermarks for 90/270 rotation") |
