| 03591160ca19 ("mmc: sdhci-msm: Read and use DLL Config property from device tree file") |
| 1dfbe3ff81f9 ("mmc: sdhci-msm: Update DDR_CONFIG as per device tree file") |
| 5c30f340f9e0 ("mmc: host: sdhci-msm: Configure dll-user-control in dll init sequence") |
| 946932d91da1 ("mmc: sdhci-msm: Enable ADMA length mismatch error interrupt") |
| fa56ac979226 ("mmc: sdhci-msm: Correct the offset and value for DDR_CONFIG register") |
| a89e7bcb1808 ("mmc: sdhci-msm: Disable CDR function on TX") |
| 21f1e2d457ce ("mmc: sdhci-msm: Re-initialize DLL if MCLK is gated dynamically") |
| bc99266bbdd2 ("mmc: host: Register changes for sdcc V5") |
| 6ed4bb438703 ("mmc: sdhci-msm: Add msm version specific ops and data structures") |
| f15358885dda ("mmc: sdhci-msm: Define new Register address map") |
| 5c132323c218 ("mmc: sdhci-msm: support voltage pad switching") |
| ac06fba1de8f ("mmc: sdhci-msm: Add support to store supported vdd-io voltages") |
| 52884f8f66c8 ("mmc: sdhci-msm: Optionally wait for signal level changes") |
| c0309b3803fe ("mmc: sdhci-msm: Add sdhci msm register write APIs which wait for pwr irq") |
| 401b2d06c4ed ("mmc: sdhci-msm: Fix HW issue with power IRQ handling during reset") |
| c7ccee224d2d ("mmc: sdhci-msm: fix issue with power irq") |
| e4bf91f6723e ("mmc: sdhci-msm: Utilize bulk clock API") |
| 4436c5359962 ("mmc: sdhci-msm: Remove platform_execute_tuning from sdhci_msm_ops") |
| 44bf23128f48 ("mmc: sdhci-msm: Provide enhanced_strobe mode feature support") |
| d7507aa1b988 ("mmc: sdhci-msm: Make HS400 tuning follow as per recommeneded HW sequence") |
| 5574ddcc60aa ("mmc: sdhci-msm: Reset vendor specific func register on probe") |
| db9bd1638115 ("mmc: sdhci-msm: Factor out sdhci_msm_hs400") |
| 0fb8a3d46b03 ("mmc: sdhci-msm: Factor out function to set/get msm clock rate") |
| b54aaa8a4fd8 ("mmc: sdhci-msm: Factor out sdhci_msm_hc_select_mode") |
| 02e4293dc013 ("sdhci: sdhci-msm: update dll configuration") |
| cc392c583d0f ("mmc: sdhci-msm: Add calibration tuning for CDCLP533 circuit") |
| abf270e5c626 ("mmc: sdhci-msm: Save the calculated tuning phase") |
| ff06ce417828 ("mmc: sdhci-msm: Add HS400 platform support") |
| b12d44db4b01 ("mmc: sdhci-msm: Add clock changes for DDR mode.") |
| edc609fd19e1 ("mmc: sdhci-msm: Implement set_clock callback for sdhci-msm") |
| 80031bdeb764 ("mmc: sdhci-msm: Add get_min_clock() and get_max_clock() callback") |
| 83736352e0ca ("mmc: sdhci-msm: Update DLL reset sequence") |
| 29301f40cb9f ("mmc: sdhci-msm: Change poor style writel/readl of registers") |
| 67e6db113c90 ("mmc: sdhci-msm: Add pm_runtime and system PM support") |
