| 07f123def73e ("PCI: dwc: Add support to enable CDM register check") |
| e44abfed6fcb ("PCI: dwc: Add accessors for write permission of DBI read-only registers") |
| 4a2745d760fa ("PCI: layerscape: Disable outbound windows configured by bootloader") |
| 02232343349e ("PCI: layerscape: Move STRFMR1 access out from the DBI write-enable bracket") |
| a36deff6d13d ("PCI: layerscape: Call dw_pcie_setup_rc() from ls_pcie_host_init()") |
| 4a301766f526 ("PCI: dwc: designware: Handle ->host_init() failures") |
| fc5165db245a ("PCI: kirin: Add HiSilicon Kirin SoC PCIe controller driver") |
| 5ffd90a035a2 ("PCI: dwc: dra7xx: Facilitate wrapper and MSI interrupts to be enabled independently") |
| f8aed6ec624f ("PCI: dwc: designware: Add EP mode support") |
| edd45e396829 ("PCI: dwc: designware: Move _unroll configurations to a separate function") |
| b50b2db266d8 ("PCI: dwc: all: Modify dbi accessors to take dbi_base as argument") |
| a660083eb06c ("PCI: dwc: designware: Add new *ops* for CPU addr fixup") |
| b2e6d3055d55 ("Merge branch 'pci/host-exynos' into next") |
