| 0d0c279405ec ("drm/i915: Refresh VLV/CHV PSR comments on HW PSR_state machine.") |
| d0d5e0d7b113 ("drm/i915/psr: Add enable_source vfunc.") |
| 49ad316f87f1 ("drm/i915/psr: Add enable_sink vfunc.") |
| 2a5db87f82cb ("drm/i915/psr: Add setup VSC vfunc.") |
| 29d1efe070d3 ("drm/i915/psr: Re-org Activate after enable") |
| 196cebddde80 ("drm/i915/psr: Move hsw_enable_source after enabling sink.") |
| 4d1fa22f4372 ("drm/i915/psr: Re-create a hsw_psr_enable_source.") |
| 2ce4df87f133 ("drm/i915/psr: Unify VSC setup functions.") |
| e3702ac9a2c1 ("drm/i915/psr: Add activate vfunc.") |
| ed63d24b4d19 ("drm/i915/psr: hsw_psr_activate.") |
| 424644c25042 ("drm/i915/psr: vfunc for disabling source.") |
| d2419ffc10e4 ("drm/i915: Plumb crtc_state to PSR enable/disable") |
| b037d58f9762 ("drm/i915: Pass crtc_state and connector state to backlight enable/disable functions") |
| b0dd6887029c ("drm/i915/dsi: rename intel_dsi_exec_vbt_sequence to intel_dsi_vbt_exec_sequence") |
| 3f751d6517d2 ("drm/i915/dsi: stop using the drm_panel framework completely") |
| b9e56754ec79 ("drm/i915/dsi: call vbt_panel_get_modes directly instead of via drm_panel") |
| 7967ef6a02c7 ("drm/i915/dsi: remove support for more than one panel driver") |
| 25b4620ee822 ("drm/i915/dsi: Skip delays for v3 VBTs in vid-mode") |
| 38dec5c0892a ("drm/i915/dsi: Call MIPI_SEQ_TEAR_ON and DISPLAY_ON for cmd-mode (untested)") |
| 7108b436c2b5 ("drm/i915/dsi: Execute MIPI_SEQ_TEAR_OFF from intel_dsi_post_disable") |
| f5bce6df8868 ("drm/i915/dsi: Group MIPI_SEQ_BACKLIGHT_ON/OFF with panel_[en|dis]able_backlight") |
| 3e40fa8a3168 ("drm/i915/dsi: Execute MIPI_SEQ_DEASSERT_RESET before calling device_ready()") |
| deae2006a3a8 ("drm/i915/dsi: Group DPOunit clock gate workaround with PLL enable") |
| c7dc5275bcbd ("drm/i915/dsi: Move MIPI_SEQ_POWER_ON/OFF calls together with pmic gpio calls") |
| 19c17df3cb5e ("drm/i915/dsi: Drop bogus MIPI_SEQ_ASSERT_RESET before POWER_ON") |
| 249f69623531 ("drm/i915/dsi: Document the panel enable / disable sequences from the spec") |
| 18a00095a5f3 ("drm/i915/dsi: Make intel_dsi_enable/disable directly exec VBT sequences") |
| 5a2e65e742ca ("drm/i915/dsi: Merge intel_dsi_disable/enable into their respective callers") |
| 3870b89a810b ("drm/i915/dsi: Move calling of wait_for_dsi_fifo_empty to mipi_exec_send_packet") |
| 1881a4234ef0 ("drm/i915: Add MIPI_IO WA and program DSI regulators") |
| 6433226b0f51 ("drm/i915/psr: set PSR_MASK bits for deep sleep") |
| d86f0482cd03 ("drm/i915/psr: set CHICKEN_TRANS for psr2") |
| 340c93c0a32a ("drm/i915/psr: enable ALPM for psr2") |
| 3fcb0ca1d8db ("drm/i915/psr: fix blank screen issue for psr2") |
| acf45d11050a ("drm/i915/psr: disable psr2 for resolution greater than 32X20") |
| 97da2ef449c4 ("drm/i915/psr: program vsc header for psr2") |
| e840fd310852 ("drm/i915/dsi: Move disable pll call outside of clear_device_ready()") |
| 213e08ad60ba ("drm/i915/bxt: add bxt dsi gpio element support") |
| 0a116ce895e7 ("drm/i915/glk: Implement Geminilake DDI init sequence") |
| 0d03926de530 ("drm/i915/glk: Add power wells for Geminilake") |
| 66478475b57e ("drm/i915: Assorted INTEL_INFO(dev) cleanups") |
| bbf35e9defb9 ("drm/i915: Pass atomic state to intel_audio_codec_enable, v2.") |
| ed37892e6df2 ("drm/i915: Address broxton phy registers based on phy and channel number") |
| e7583f7b1018 ("drm/i915: Add location of the Rcomp resistor to bxt_ddi_phy_info") |
| 842d416654eb ("drm/i915: Create a struct to hold information about the broxton phys") |
| b6e08203cc1f ("drm/i915: Move broxton vswing sequence to intel_dpio_phy.c") |
| f38861b814b5 ("drm/i915: Move DPIO phy documentation section to intel_dpio_phy.c") |
| 47a6bc61b866 ("drm/i915: Move broxton phy code to intel_dpio_phy.c") |
| b284eedaf74b ("drm/i915: Pass lane count to bxt_ddi_phy_calc_lane_optmin_mask()") |
| 362624c9ba3f ("drm/i915: Explicitly map broxton DPIO power wells to phys") |
