| 385ba629aa1c ("drm/i915: Allow /2 CD2X divider on gen11+") |
| 63c9dae71dc5 ("drm/i915/ehl: Add voltage level requirement table") |
| b16c7ed95caf ("drm/i915: Do not touch the PCH SSC reference if a PLL is using it") |
| 4f338ac0b2fa ("drm/i915/icl: use ranges for voltage level lookup") |
| 8b67896e3ba1 ("drm/i915: Pass intel_atomic_state to cdclk funcs") |
| ebb5eb7d731c ("drm/i915: Replace pcu_lock with sb_lock") |
| 337fa6e04d40 ("drm/i915: Lift sideband locking for vlv_punit_(read|write)") |
| 221c78623ea5 ("drm/i915: Lift acquiring the vlv punit magic to a common sb-get") |
| a75d035fedbd ("drm/i915: Disable preemption and sleeping while using the punit sideband") |
| 844e33135d3a ("drm/i915: Remove unwarranted clamping for hsw/bdw") |
| 59f9e9cab3a1 ("drm/i915: Skip modeset for cdclk changes if possible") |
| 48d9f87ddd21 ("drm/i915: Save the old CDCLK atomic state") |
| 905801fe7237 ("drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled") |
| 97a04e0d07c4 ("drm/i915: switch intel_wait_for_register to uncore") |
| d2d551c06f81 ("drm/i915: intel_wait_for_register_fw to uncore") |
| a2b4abfc626b ("drm/i915: switch uncore mmio funcs to use intel_uncore") |
| 6cc5ca768825 ("drm/i915: rename raw reg access functions") |
| 6ebc9692a7ad ("drm/i915: make raw access function work on uncore") |
| 25286aaca9ce ("drm/i915: move regs pointer inside the uncore structure") |
| 272c7e52302e ("drm/i915: reduce the dev_priv->uncore dance in uncore.c") |
| cb7ee69015aa ("drm/i915: make find_fw_domain work on intel_uncore") |
| f7de50278e5c ("drm/i915: make more uncore function work on intel_uncore") |
| 3ceea6a1b4d2 ("drm/i915: use intel_uncore for all forcewake get/put") |
| f568eeee5355 ("drm/i915: use intel_uncore in fw get/put internal paths") |
| 159367bb9e74 ("drm/i915: always use masks on FW regs") |
| fd79d93985e0 ("drm/i915/selftests: add test to verify get/put fw domains") |
| 535d8d27c0e2 ("drm/i915: do not pass dev_priv to low-level forcewake functions") |
| 9be8644a14c6 ("drm/i915/icl: split combo and mg pll disable") |
| 036f8d567b6c ("drm/i915/icl: split pll enable in three steps") |
| d2ab5ebf46b4 ("drm/i915/icl: split combo and mg pll enable") |
| 2dd24a9c2c8d ("drm/i915/gen11+: First assume next platforms will inherit stuff") |
| 993298af26b1 ("drm/i915: Yet another if/else sort of newer to older platforms.") |
| 510a75a5d2b8 ("drm/i915/icl: move MG pll hw_state readout") |
| 49a630b00bac ("drm/i915: Enable and Disable of HDCP2.2") |
| 09d56393c1d8 ("drm/i915: hdcp1.4 CP_IRQ handling and SW encryption tracking") |
| 9055aac76589 ("drm/i915: MEI interface implementation") |
| 04707f971636 ("drm/i915: Initialize HDCP2.2") |
| 4c719c256a0f ("drm/i915: Gathering the HDCP1.4 routines together") |
| d31c85fc8642 ("snd/hda, drm/i915: Track the display_power_status using a cookie") |
| 5e0b6697651b ("drm/i915: Assert that VED and ISP are power gated") |
| c11b813f53c9 ("drm/i915: s/PUNIT_REG_DSPFREQ/PUNIT_REG_DSPSSPM/") |
| 13717cef4c1d ("drm/i915/icl: Add icl pipe degamma and gamma support") |
| 9d5441de28e2 ("drm/i915: Populate gamma_mode for all platforms") |
| 051a6d8d3ca0 ("drm/i915: Move LUT programming to happen after vblank waits") |
| 4d8ed54c0447 ("drm/i915: Split color mgmt based on single vs. double buffered registers") |
| 87cefd57c88a ("drm/i915: Pull GAMMA_MODE write out from haswell_load_luts()") |
| 23b03a272c2b ("drm/i915: Constify the state arguments to the color management stuff") |
| 5f4f3e386b36 ("drm/i915: Precompute gamma_mode") |
| 7eb31a0bb2c1 ("drm/i915: Split the gamma/csc enable bits from the plane_ctl() function") |
| e4c0d5314ded ("drm/i915: Apply LUT validation checks to platforms more accurately (v3)") |
