| 7666dfd533d4 ("Revert "pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D"") |
| 3672bc709343 ("Revert "pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2"") |
| e87882eb9be1 ("pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2") |
| e167d723e1a4 ("pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D") |
| 69f7be1c6314 ("pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macro") |
| f83f97684a73 ("pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length") |
| 94482af7055e ("pinctrl: sh-pfc: sh7734: Add missing IPSR11 field") |
| b0f77269f6bb ("pinctrl: sh-pfc: r8a77980: Add missing MOD_SEL0 field") |
| 67d7745bc78e ("pinctrl: sh-pfc: r8a77970: Add missing MOD_SEL0 field") |
| 6a6c195d98a1 ("pinctrl: sh-pfc: r8a7794: Remove bogus IPSR9 field") |
| 6d4036a1e3b3 ("pinctrl: sh-pfc: Initial R8A77990 PFC support") |
| 73dacc340343 ("pinctrl: sh-pfc: Add r8a77470 PFC support") |
| f59125248a69 ("pinctrl: sh-pfc: Add R8A77980 PFC support") |
| 490e687eb8b2 ("pinctrl: sh-pfc: Initial R-Car M3-N support") |
| b92ac66a1819 ("pinctrl: sh-pfc: Add R8A77970 PFC support") |
| 794a67117646 ("pinctrl: sh-pfc: Initial R8A77995 PFC support") |
| c8bac70f079b ("pinctrl: sh-pfc: r8a7794: Add R8A7745 support") |
| 13385db5479a ("pinctrl: sh-pfc: r8a7794: Remove reserved bits") |
| 5128238dd7ce ("pinctrl: sh-pfc: r8a7794: Rename some I2C signals") |
| 8df62701496d ("pinctrl: sh-pfc: r8a7791: Add R8A7743 support") |
| e1b5f32dc2c3 ("pinctrl: sh-pfc: r8a7791: Grand I2C rename") |
| 5f4c8cafe114 ("pinctrl: sh-pfc: r8a7794: Swap ATA signals") |
| 0cbdc11482d7 ("pinctrl: sh-pfc: r8a7791: Fix IPSR comment typos") |
| 3908632fb829 ("pinctrl: sh-pfc: r8a7791: Add missing DVC_MUTE signal") |
| b205914c8f82 ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") |
| b332da51a929 ("pinctrl: sh-pfc: r8a7795: Restore sort order") |
| 4324b6084f45 ("pinctrl: sh-pfc: r8a7795: Fix hscif2_clk_b and hscif4_ctrl") |
| 07254d835dfc ("pinctrl: sh-pfc: r8a7791: Add ADI pinconf support") |
| 4c2fb44d60b9 ("pinctrl: sh-pfc: r8a7795: Support none GPIO pins bias setting") |
| b25719eb938e ("pinctrl: sh-pfc: r8a7795: Add group for AVB MDIO and MII pins") |
| ea9c740583c6 ("pinctrl: sh-pfc: r8a7795: Support none GPIO pins with configurable drive-strength") |
| d3b861bccdee ("pinctrl: sh-pfc: r8a7795: Use lookup function for bias data") |
