| 7ad549ffcbd7 ("pinctrl: sh-pfc: r8a77990: Use new macros for non-GPIO pins") |
| 4d1816cd6724 ("pinctrl: sh-pfc: Move PIN_NONE to shared header file") |
| 86c045c2e420 ("pinctrl: sh-pfc: r8a77965: Replace DU_DOTCLKIN2 by DU_DOTCLKIN3") |
| f7d8b568e204 ("pinctrl: sh-pfc: r8a77990: GP6_9 does not have pull-down capability") |
| 83f6941a42a5 ("pinctrl: sh-pfc: r8a77990: Add bias pinconf support") |
| 6d4036a1e3b3 ("pinctrl: sh-pfc: Initial R8A77990 PFC support") |
| f59125248a69 ("pinctrl: sh-pfc: Add R8A77980 PFC support") |
| 490e687eb8b2 ("pinctrl: sh-pfc: Initial R-Car M3-N support") |
| b92ac66a1819 ("pinctrl: sh-pfc: Add R8A77970 PFC support") |
| 3f8833ad6651 ("pinctrl: sh-pfc: r8a7778: Use generic bias register description") |
| 58668a67afa1 ("pinctrl: sh-pfc: r8a7796: Use generic bias register description") |
| 6f4b74f37576 ("pinctrl: sh-pfc: r8a7795: Use generic bias register description") |
| e1a16b5b426c ("pinctrl: sh-pfc: r8a7795-es1: Use generic bias register description") |
| e16a2c7aced8 ("pinctrl: sh-pfc: Drop width parameter of sh_pfc_{read,write}_reg()") |
| 794a67117646 ("pinctrl: sh-pfc: Initial R8A77995 PFC support") |
| fc8fd9be2ce7 ("pinctrl: sh-pfc: r8a7795: Rename CS1# pin function definitions") |
| f9d130808c9a ("pinctrl: sh-pfc: r8a7795: Change USB3_{OVC,PWEN} definitions") |
| bf1a8aa0a2d6 ("pinctrl: sh-pfc: r8a7796: Rename CS1# pin function definitions") |
| 30c078de6f37 ("pinctrl: sh-pfc: r8a7795: Add EtherAVB pins, groups and function") |
| 5c6aa7bdd2eb ("pinctrl: sh-pfc: r8a7795-es1: Rename SSI_{WS,SCK}34 to SSI_{WS,SCK}349") |
| 68e638920012 ("pinctrl: sh-pfc: r8a7795: Rename SSI_{WS,SCK}34 to SSI_{WS,SCK}349") |
| 07073b885871 ("pinctrl: sh-pfc: r8a7796: Rename SSI_{WS,SCK}34 to SSI_{WS,SCK}349") |
| e7ad4d3c1dd9 ("pinctrl: sh-pfc: r8a7795: Add SCIF support") |
| b205914c8f82 ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") |
| b332da51a929 ("pinctrl: sh-pfc: r8a7795: Restore sort order") |
| 4324b6084f45 ("pinctrl: sh-pfc: r8a7795: Fix hscif2_clk_b and hscif4_ctrl") |
| 4c2fb44d60b9 ("pinctrl: sh-pfc: r8a7795: Support none GPIO pins bias setting") |
| 2d40bd24274d ("pinctrl: sh-pfc: r8a7796: Add bias pinconf support") |
| 9e35d6fa825c ("pinctrl: sh-pfc: r8a7796: Add drive strength support") |
| b25719eb938e ("pinctrl: sh-pfc: r8a7795: Add group for AVB MDIO and MII pins") |
| ea9c740583c6 ("pinctrl: sh-pfc: r8a7795: Support none GPIO pins with configurable drive-strength") |
| 5c296f69ab71 ("pinctrl: sh-pfc: r8a7778: Use lookup function for bias data") |
| d3b861bccdee ("pinctrl: sh-pfc: r8a7795: Use lookup function for bias data") |
| 42831cf96531 ("pinctrl: sh-pfc: r8a7795: Simplify get bias logic") |
| fb0828316bf6 ("pinctrl: sh-pfc: r8a7796: Add DRIF support") |
| 02609a2335fd ("pinctrl: sh-pfc: r8a7796: Add I2C pin support") |
