| 81a48ee41738 ("RISC-V: Remove udivdi3") |
| 50acfb2b76e1 ("treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286") |
| a266cdba17b3 ("RISC-V: lib: minor asm cleanup") |
| 85d90b91807b ("RISC-V: lib: Fix build error for 64-bit") |
| 7f47c73b355f ("RISC-V: Build tishift only on 64-bit") |
| a89757daf25c ("RISC-V: implement __lshrti3.") |
| 921ebd8f2c08 ("RISC-V: Allow userspace to flush the instruction cache") |
| 08f051eda33b ("RISC-V: Flush I$ when making a dirty page executable") |
| 28dfbe6ed483 ("RISC-V: Add VDSO entries for clock_get/gettimeofday/getcpu") |
| b7e5a591502b ("RISC-V: Remove __vdso_cmpxchg{32,64} symbol versions") |
| fbe934d69eb7 ("RISC-V: Build Infrastructure") |
| e2c0cdfba7f6 ("RISC-V: User-facing API") |
| 07037db5d479 ("RISC-V: Paging and MMU") |
| 6d60b6ee0c97 ("RISC-V: Device, timer, IRQs, and the SBI") |
| 7db91e57a0ac ("RISC-V: Task implementation") |
| 5d8544e2d007 ("RISC-V: Generic library routines and assembly") |
| fab957c11efe ("RISC-V: Atomic and Locking Code") |
| 76d2a0493a17 ("RISC-V: Init and Halt Code") |
| bcb63314e2c2 ("[media] media: Drop FSF's postal address from the source code files") |
