blob: dfa29eccc477867c2178b1ff527da82f70824a54 [file] [log] [blame]
8531f0587f5c ("drm/msm/dsi: configure VCO rate for 10nm PLL driver")
28e4309ab9c2 ("drm/msm/dsi: Populate PLL 10nm clock ops")
973e02db35c2 ("drm/msm/dsi: Add skeleton 10nm PHY/PLL code")
f079f6d999cb ("drm/msm/dsi: Add PHY/PLL for 8x96")